Event Driven Simulation

Event-driven simulation is a very effective scheme for circuit simulation as it is based on detection of any signal change (event) to trigger other signal(s). So, an event triggers new events, which in turn may trigger more events; the first trigger is a change in primary input. Let us consider a circuit (the same one as of Figure 4) illustrated in Figure 5. Suppose, all signals are in steady-state by inputs I1=1, I2=1, I3=1,I4=1 when a new pattern I1=0, I2=1, I3=1,I4=1 is applied to primary inputs; in other words I1 changes from 1 to 0. Change in I1 is the first event. Outputs of gates, whose inputs are dependent on events which have changed, become active and are placed in an activity list; I1 drives gate G1 and OG1 becomes a part of activity list. In the >> step (time instant) each gate from the activity list is evaluated to determine whether its output changes; if output changes it becomes a triggering event and all gates driven by this output becomes a part of activity list. In this example, output of G1 changes (from 1 to 0) and this event adds O (output of G3) to activity list. On the other hand, if the output (of the gate under consideration) remains same then it does not correspond to triggering event and it does not generate any new gates for activity list. Here, output of G2 does not change and so it cannot add any gate to activity list. Once a gate from activity list is evaluated it is removed. The process of evaluation stops when the activity list becomes empty. In this example, in step 3, O changes from 1 to 0 and this makes the activity list empty. So, in event driven simulation we performed only three evaluations which are the number of signal changes in the circuit. An event-driven simulator only does the necessary amount of work. For logic circuits, in which typically very few signals change at a time, this can result in significant savings of computing effort.

Figure 5. Example of event driven simulation

3. Algorithms for Fault Simulation

A fault simulator is like an ordinary simulator, but needs to simulate two versions of a circuit (i) without any fault for a given input pattern and (ii) with a fault inserted in the circuit and for the same input pattern. If the outputs under normal and faulty situation differ, the pattern detects the fault. Step (ii) is repeated for all faults. Once a fault is detected it is dropped and is not considered further during fault simulation by >> random pattern. The basic idea is illustrated in Figure 6.

The procedure is simple, but is too complex in terms of time required. Broadly speaking, time required is .
Now we discuss algorithms which attempt to reduce this time. Basically such algorithms are based on two factors

1. Determine more than one fault that is detected by a random pattern during one simulation run
2. Minimal computations when the input pattern changes; the motivation is similar to event driven simulation over complied code simulation.