Now the question is, do we require these three steps for all faults? If this is the case, then TPG would take significant amount of time. However, we know that one test pattern can test multiple faults. In this lecture we will see how TPG time can be reduced using the concept of “one TP can test multiple faults”.
Let us understand the basic idea of TPG time reduction on the example of Figure 1. Let us not try to generate a test pattern for a fault, rather apply a random pattern as see what faults are covered. Table 2 shows two random patterns and the faults they test. For example, the random pattern No. 1 generates a 0 at the output of G1, 1 at the outputs of gates G2 through G5 and 0 at the output of G6. It can be easily verified that this pattern can test s-a-1 fault at two locations.
..................• output of G1
..................• output of G6
...........In case of faults, output at O is 1 and under normal conditions it is 0.
However, the >> random pattern (No.2) can detect a lot more s-a faults in the circuit. It can test s-a-0 faults in all nets of the circuit. For example, let us take s-a-0 fault at output of G3. It can be easily verified that if this pattern is applied, O will be 0 if fault is present and 1 other wise. Similarly, we can verify that all possible s-a-1 faults in the circuit (31 in number) would be tested.
| Pattern No. | Random Pattern I1 I2 I3 I4 I5 I6……………………I25 |
Faults Detected |
|
| 1 |
|
s-a-1 at net “output of G1” |
|
| 2 | 1 1 1 1 1 11111111111111111111 | s-a-0 faults in all the nets of the circuit |
So we can see that by using 2 random patterns we have generated test patterns for 33 faults. On the other hand if we would have gone by the “sensitize-propagate-justify” approach these three steps would have been repeated 33 times. Now let us enumerate the steps used to generate the random test patters and determine the list of faults detected ( called faults covered ).
............1. Generate a random pattern
...........2. Determine the output of the circuit for that random pattern as input
...........3. Take fault from the fault list and modify the Boolean functionally of the gate whose input has the fault. For example, in the circuit in Figure 1, the s-a-1 fault at the output of gate G1 modifies the Boolean functionality of gate G6 as 1 AND I2 AND I3 AND I4 AND I5 (which is equivalent to I2 AND I3 AND I4 AND I5) .
...........4. Determine output of the circuit with fault for that random pattern as input.
...........5. If the output of normal circuit varies from the one with fault, then the random pattern detects the fault under consideration.
...........6. If the fault is detected, it is removed from the fault list.
...........7. Steps 3 to 6 are repeated for another fault in the list. This continues till all faults are considered.
...........8. Steps 1 to 7 are repeated for another random pattern. This continues till all faults are detected.
In simple words, new random patterns are generated and all faults detected by the pattern are dropped. This continues till all faults are detected by some (random) pattern. Now the question arises, “How many random patterns are required for a typical circuit”? The answer is very high. This situation is identical to the game of “Balloon blasting with air gun”. If there are a large number of balloons in the front, aim is not required and almost all shots (even without aim) will make a successful hit. However, as balloons become sparse blind hits would rarely be successful. So, the balloons left after blind shooting are to be aimed and shot. The same is true for testing. For initial few random patterns faults covered will be very high. However, as the number of random patterns increase the number of new faults being covered decreases sharply; this phenomenon can be seen from the graph of Figure 2. It may be noted that typically beyond 90% fault coverage, it is difficult to find a random pattern that can test a new fault. So, for the remaining 10% of faults it is better to use the “sensitize-propagate-justify” approach. These remaining 10% of faults are called difficult to test faults.