References

[1] John P. Uyemura, , “CMOS Logic Circuit Design”, Kluwer Academic Publishers, 1 st Edition, 1999

[2] Stephen M. Trimberger, “Introduction to CAD for VLSI”, Kluwer Academic Publishers, 1 st Edition, 1987

[3] Daniel D. Gajski and Loganath Ramachandran, “Introduction to High-Level Synthesis”, IEEE Design and. Test, volume 11,No, 4,1994, pp 44—54.

[4] Daniel D. Gajski, Nikil D. Dutt, Allen C-H Wu, Steve Y-L Lin, “High-Level Synthesis: Introduction to Chip and System Design”, Kluwer Academic Publishers, 1 st Edition, 1992

[5] Jr., Edmund M. Clarke, Orna Grumberg and Doron A Peled, “Model checking”, MIT Press, 1 st Edition, 1999.

[6] Giovanni De Micheli, “Synthesis and Optimization of Digital Circuits”, McGraw-Hill Higher Education, 1 st Edition, 1994

[7] Naveed A. Sherwani, “Algorithms for VLSI Physical Design Automation”, Kluwer Academic Publishers, 2 nd Edition, 1995

[8] M. Abramovici, M.A. Breuer, and A.D. Friedman. Digital Systems Testing and Testable Design. Wiley-IEEE Press, 1994.