Module 6 : Semiconductor Memories
Lecture 28 : Basics Of DRAM Cell And Access Time Consideration
 
29.6 Area Considerations
To reduce the area requirement, still allowing the larger capacitance for storage, retrofit technique is used. In this case, the capacitors are laid down as shown below in Figure 29.31
 
retrofit
Fig 29.31: Retrofit Technique
 
Standard DRAM cell uses diffusion, poly or metal as the bit line which will be discussed later.
 
Typical area calculation for storage capacitance is illustrated in Figure 29.32
 
lambda
Fig 29.32: Area Calculation
 
Area, A, consumed by the capacitor is given by:
 
areaA (Eq 29.4)
 
Large area leads to large storage capacitance. Large storage capacitance leads to large change in bit voltage image and therefore the access time will be small. DRAM cell with small access time can be designed by improvement on cell itself and the sense amplifier.
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
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