1.  Introduction

As discussed in the “Design” part of the course, digital VLSI design flow can be sub-divided into two parts, namely frontend and backend. Frontend part starts with design specifications and generates gate level circuit implementation. Backend part starts with the gate level circuit and finally produces layout of the circuit in terms of transistors, power lines, I/O pads etc. which is used for fabrication; in this course we have not covered the backend part of the design flow. In case of both frontend and backend, we perform many transformations, however, it is mandatory that equivalence in terms of specifications are to be maintained across transformations. In other words, the final design should implement the intent provided in the specifications. So, to ensure that transformations do not change specifications, equivalence is to be established between two versions of a circuit, before and after transformation, e.g., gate level version is to be equivalent with the register transfer level version.

A circuit having n inputs as i₁,i₂, i₃,....i_n and m outputs as 0₁,0₂, 0₃, ...0_m can be represented in many ways which can be directly used for equivalence checking (with other versions). The simplest way is to use truth tables [1]. The truth table comprises 2ⁿ rows starting from (each row corresponds to an input combination). Also output values of 0₁,0₂, 0₃, ...0_m for the corresponding input combinations are stored. Once we have truth tables of both the circuit versions, we just need to see that output values of both the truth tables are same for each corresponding row (i.e., combinations).

nother technique to represent digital circuits is to use Binary Decision Trees (BDT) [2]. Corresponding to each output 0₁,0₂, 0₃, ...0_m there is binary tree. There are 2ⁿ leaf nodes of each tree, and each leaf node (for the tree corresponding to 0₁, say) represents a value of 0₁

for an input combination. Input combination for a leaf node is determined by the path from root to the leaf node under question, which comprises n non-leaf nodes, one for each input variable i₁,i₂, i₃,....i_n. If the left (right) path is taken from the non-leaf node corresponding to an input i₁ say, then the value for i₁ is 0 (1). Similarly, conditions for all inputs i₁,i₂, i₃,....i_n can be determined for a leaf node. Now, if two circuit versions are to be equivalent, then all the binary decision trees for 0₁,0₂, 0₃, ...0_m are to be same (exact image) for both the versions.

It may be noted that once a truth table or binary decision tree is created, equivalence checking is very simple, involving a matter of checking exact match of the corresponding elements. However, the major problem is in creating and maintaining the binary decision tree of the truth table. A circuit having n inputs and m outputs has entries in the truth table; 2ⁿ rows and m outputs for each row. Similarity, for such a circuit the number of nodes in the BDT is Any practical VLSI circuit may easily contain 100s of inputs and outputs, thereby making construction of binary decision tree or truth table impossible within practical time lines.

It may be noted that although digital circuits can be represented efficiently using Boolean functions [1], but they cannot be directly used for equivalence checking (which was the case in binary trees and truth tables). For example, Boolean functions “x+0” and “x” (x is a Boolean variable) are equivalent even if they look structurally different.

To cater to the issue of high complexity in generating binary decision tree or truth table, a new data structure called Ordered Binary Decision Diagram (OBDD) was proposed by R.E. Bryant [3]. Broadly speaking an OBDD comprises much lower number of nodes compared to 2ⁿ, (for a circuit having n inputs) and at the same time two equivalent circuits will generate the same OBDD (which can be directly used for comparison).

In this module, we will study in details about OBDDs, comprising basic introduction, construction algorithm, operations on OBDDs and representation of sequential circuits. In the first lecture we will start with an introduction to OBDDs.