References

•  M. J. Y. Willaims and J. B. Angell, “Enhancing Testability of Large-Scale Integrated Circuits via Test Points and Additional Logic,” IEEE Trans. on Computers, vol. C-22, no. 1, pp. 46–60, 1973.

•  K.-T. Cheng and V. D. Agrawal, “A Partial Scan Method for Sequential Circuits with Feedback,” IEEE Trans. on Computers, vol. 39, no. 4, pp. 544–548, Apr. 1990.