Module 6 : Semiconductor Memories
Lecture 30 : SRAM and DRAM Peripherals
 
30.2 SRAM And Its Peripherals
 
sramfull
Fig 30.21: SRAM Cell
 
Figure 30.21 shows a standard 6 transistor SRAM cell. The signal designed as WLis the WORDLINE used to read or write into the cell. BL and BLbarare the data to be written into the cell.
 
buffers
Fig 30.22: Circuit for reading and writing data into cell
 
The circuits shown in the previous page are used to write and read the data to and from the cell. When a read operation is to be performed, rwsignal is made HIGH and at the same time rwbaris made LOW. As a result the data present on the bit and bitbarlines are transferred to the input of the sense amplifier (Sense amplifier operation will be discussed shortly). The sense amplifier then senses the data and gives the output.
 
During the write operation, rwis made LOW and rwbar is made HIGH. Thus the DATAand databar will be written onto the bitand bitbarlines respectively.
 
However the read and write operation on a particular cell takes place only if the cell is enabled by the corresponding row(Word) and column(Digit) lines. It is important to remember that before every read operation, the bitand bitbarare precharged to a voltage (usually VDD/2). During read operation, one of the two BIT ( bit or bitbar) lines discharges slightly whereas the other line charges to a voltage slightly greater than its precharged value. This difference in these voltages is detected by the sense amplifier to produce and output voltage, which corresponds to te stored value in the cell which is read. Care should be taken in sizing the transistors to ensure that the data stored in the cell does not change its value.
 
 
 
 
 
 
 
 
 
 
 
 
 
 
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