Module 4 : Propagation Delays in MOS
Lecture 23 : Logical Effort of Multistage Logic Networks
 
23.3 Reduction of Delay
For the minimum delay of the circuit we optimizes the number of stages. Let total number of stages be N = n1 + n2
Fig 23.31: Example Circuit
But the number of stages for minimum delay may not be the integer ,so it is not feasible to implement it . So we realise the circuit by either taking the number of stages greatest integer of the obtained value or the one more then the greatest integer whatever gives us the minimun delay .
We will study about in more details in next chapter.
Fig 23.32:
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
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