Module 4 : Propagation Delays in MOS
Lecture 22 : Logical Effort Calculation of few Basic Logic Circuits
 
22.5 Logical Effort of a XOR Gate
A two input XOR gate is shown in figure 22.5.

Here we will calculate the logical effort for a bundle (A* or B*) instead of only one input as complementary inputs are applied.
Logical effort for a bundle A is g = (2+4+2+4)/ (1+2) = 4.
Logical effort for a bundle B is g = (2+4+2+4)/ (1+2) = 4.

 

Fig 22.4: XOR Gate  
 
22.6 Examples Circuits
Example Circuit 1:   Example Circuit 2: 4 BIT MUX
Example 1:
Example2:

Logical effort for input D is
gD = (2+4)/ (1+2) = 2
Logical effort for bundle S is
g
s =(2+4)/ (1+2) = 2.

For one arm, g = 12/3 = 4
For N-way symmetrical MUX
g= 4N (this is for the static CMOS MUX only)

Fig 22.61: Example Circuit 1
 
Fig 22.62: Example Circuit 2
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
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