Region 3 : In this region, . Both the transistors are in saturation, the drain current attains a maximum value, and the output voltage falls rapidly. The inverter exhibits gain. But this region is inherently unstable. As both the transistors are in saturation, equating their currents, one gets (as ).

................................(2.14)

where and . Solving for the logic threshold voltage V_inv , one gets

....................................................(2.15)

Note that if and , then V_inv =0.5 V_DD .