Module 9: Addendum to Module 6: Shared Memory Multiprocessors
  Lecture 17: Multiprocessor Organizations and Cache Coherence
 


Implementations

  • Must invalidate all cached copies before allowing a store to proceed
    • Need to know where the cached copies are
    • Solution1: Never mind! Just tell everyone that you are going to do a store
      • Leads to broadcast snoopy protocols
      • Popular with small-scale bus-based CMPs and SMPs
      • AMD Opteron implements it on a distributed network (the Hammer protocol)
    • Solution2: Keep track of the sharers and invalidate them when needed
      • Where and how is this information stored?
      • Leads to directory-based scalable protocols
  • Directory-based protocols
    • Maintain one directory entry per memory block
    • Each directory entry contains a sharer bitvector and state bits
    • Concept of home node in distributed shared memory multiprocessors
    • Concept of sparse directory for on-chip coherence in CMPs