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Module 9: Addendum to Module 6: Shared Memory Multiprocessors |
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Lecture 17: Multiprocessor Organizations and Cache Coherence |
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Implementations
- Must invalidate all cached copies before allowing a store to proceed
- Need to know where the cached copies are
- Solution1: Never mind! Just tell everyone that you are going to do a store
- Leads to broadcast snoopy protocols
- Popular with small-scale bus-based CMPs and SMPs
- AMD Opteron implements it on a distributed network (the Hammer protocol)
- Solution2: Keep track of the sharers and invalidate them when needed
- Directory-based protocols
- Maintain one directory entry per memory block
- Each directory entry contains a sharer bitvector and state bits
- Concept of home node in distributed shared memory multiprocessors
- Concept of sparse directory for on-chip coherence in CMPs
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