Test & Set

• Less general compared to exchange

  Lock: ts register, lock_addr
  bnez register, Lock
  Unlock remains unchanged

• Loads current lock value in a register and sets location always with 1
  • Exchange allows to swap any value
• A similar type of instruction is fetch & op
  • Fetch memory location in a register and apply op on the memory location
  • Op can be a set of supported operations e.g. add, increment, decrement, store etc.
  • In Test & set op=set

Fetch & op

• Possible to implement a lock with fetch & clear then add (used to be supported in BBN Butterfly 1)

  addi reg1, r0, 0x1
  Lock: fetch & clr then add reg1, reg2, lock_addr
  /* fetch in reg2, clear, add reg1 */
  bnez reg2, Lock

• Butterfly 1 also supports fetch & clear then xor
• Sequent Symmetry supports fetch & store
• More sophisticated: compare & swap
  • Takes three operands: reg1, reg2, memory address
  • Compares the value in reg1 with address and if they are equal swaps the contents of reg2 and address
  • Not in line with RISC philosophy (same goes for fetch & add)