Module 14: "Directory-based Cache Coherence"
  Lecture 30: "SGI Origin 2000"
 

Origin 2000 network

  • Each router has six pairs of 1.56 GB/s unidirectional links; two to nodes (bristled), four to other routers
  • 41 ns pin to pin latency
  • Four virtual networks: request, reply, priority, I/O

Origin 2000 I/O

  • Any processor can access I/O device either through uncached ops or through coherent DMA
  • Any I/O device can access any data through router/hub

Origin directory

  • Directory formats
    • If exclusive in a cache, entry contains processor number (not node number)
    • If shared, entry is a bitvector of sharers where each corresponds to a node (not a processor)
      • Invalidations sent to a node is broadcast to both processors by hub
    • Two sizes
      • 16-bit format (up to 32 processors), kept in DRAM
      • 64-bit format (up to 128 processors), kept in extension DRAM
      • For machine sizes larger than 128 processors the protocol is coarse-vector (each bit is for 8 nodes)
      • Machine can switch between BV and CV dynamically