Organization of Intel 8086 Microprocessor                                                                                                 Print this page
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- The bus high enable (BHE) signal is used to indicate the transfer of data over the higher order data bus. It goes low for the data transfer over and is used to derive chip select of odd address memory bank or peripherals.

Indication

0

0

Whole word

0

1

Upper byte from or to odd address

1

0

Lower byte from or to even address

1

1

None

- : Read : whenever the read signal is at logic 0, the data bus receives the data from the memory or I/O devices connected to the system

READY - This is the acknowledgement from the slow devices or memory that they have completed the data transfer operation. This signal is active high.

INTR - Interrupt Request: Interrupt request is used to request a hardware interrupt. If INTR is held high when interrupt enable flag is set, the 8086 enters an interrupt acknowledgement cycle after the current instruction has completed its execution.

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