-The address/ data bus lines are the multiplexed address data bus and contain the right most eight bit of memory address or data. The address and data bits are separated by using ALE signal.

-The address/data bus lines compose the upper multiplexed address/data bus. This lines contain address bit or data bus . The address and data bits are separated by using ALE signal.

- The address/status bus bits are multiplexed to provide address signals and also status bits . The address bits are separated from the status bits using the ALE signals. The status bit is always a logic 0, bit indicates the condition of the interrupt flag bit. The and combinedly indicate which segment register is presently being used for memory access.

		Funtion
0	0	Extra segment
0	1	Stack segment
1	0	Code or no segment
1	1	Data Segment