There is one entry in the hash table and the inverted page table for each real memory page rather than one per virtual page.
Thus a fixed portion of real memory is required for the page table, regardless of the number of processes or virtual page supported.
Because more than one virtual address may map into the hash table entry, a chaining technique is used for managing the overflow.
The hashing techniques results in chains that are typically short – either one or two entries.
The inverted page table structure for address translation is shown in the Figure 3.26.