Each virtual address generated by the processor is interpreted as virtual page number (high order list) followed by an offset (lower order bits) that specifies the location of a particular word within a page. Information about the main memory location of each page kept in a page table.

Some processors make use of a two level scheme to organize large page tables.

In this scheme, there is a page directory, in which each entry points to a page table.

Thus, if the length of the page directory is  X, and if the maximum length of a page table is  Y, then the process can consist of up to  X * Y  pages.

Typically,  the maximum length of page table is restricted to the size of one page frame.