Course Name: Embedded Systems-Design Verification and Test

Course abstract

An embedded system (ES) can be described as a computing system which is part of a larger physical system. Examples of ESs range from a simple elevator controller to a complex avionics control system. Unlike a general purpose computer system, ESs are typically designed for specific functionalities, often with stringent performance objectives and constraints related to real-time accuracy, area, power, cost etc. Their implementations may include both software and hardware components and may necessitate integration with sensors and actuators. The increase in complexity of modern ESs mandates automation in their design. Given a system which we intend to implement, the design process majorly evolves through distinct but often overlapping and iterative phases which include,i. modeling of the intended system behavior, ii. design of appropriate structural representations and implementation methodologies, corresponding to the specified behavior, iii. verification and validation of the correctness and performance related properties that the designed system should satisfy, and iv. testing whether the prototyped / manufactured implementation actually performs the required behaviour. The proposed course will systematically cover all these topics so that the student gains an end-to-end understanding of the overall ES design process.


Course Instructor

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Santosh Biswas

Dr. Santosh Biswas is an Associate Professor in the Dept. of CSE IIT Guwahati. He has an experience of 8 years in teaching. His research interests are Fault Tolerance, VLSI Testing, Embedded Systems
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Jatindra Kumar Deka

Dr. J K Deka is a Professor in the Dept. of CSE IIT Guwahati. He has an experience of more than 20 years in teaching. His research interests are Formal Modelling and Verification, CAD for VLSI and Embedded Systems (Design, Testing and Verification), Data Mining
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Arnab Sarkar

Dr. Arnab Sarkar is an Asst. Professor in the Dept. of CSE IIT Guwahati. He has an experience of 3 years in teaching and about 2 years in industry. His research interests Real-Time and Embedded Systems, Computer Architecture, Algorithms.
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Teaching Assistant(s)

Vasudevan.M.S

M.Tech

IITG

Aswathy.N.S

M.Tech

IITG

Sanjit Kumar Roy

M.Tech in Information Security

IITG

 Course Duration : Jul-Oct 2018

  View Course

 Enrollment : 18-Apr-2018 to 30-Jul-2018

 Exam registration : 25-Jun-2018 to 18-Sep-2018

 Exam Date : 28-Oct-2018

Enrolled

5680

Registered

165

Certificate Eligible

99

Certified Category Count

Gold

0

Silver

0

Elite

23

Successfully completed

76

Participation

32

Success

Elite

Gold





Legend

>=90 - Elite + Gold
60-89 - Elite
40-59 - Successfully Completed
<40 - No Certificate

Final Score Calculation Logic

  • Assignment Score = Average of best 8 out of 12 assignments.
  • Final Score(Score on Certificate)= 75% of Exam Score + 25% of Assignment Score.
Embedded Systems-Design Verification and Test - Toppers list

DEEPAK SAHU 87%

INDIAN INSTITUTE OF INFORMATION TECHNOLOGY KALYANI

SUPARNA PANCHANAN 84%

REGENT EDUCATION & RESEARCH FOUNDATION

AVIK GHOSH DASTIDAR 81%

REGENT EDUCATION & RESEARCH FOUNDATION

MONIKA SHARMA 78%

N/A

KODURI VENKATA SUBBA RAO 77%

VIGNANA BHARATHI INSTITUTE OF TECHNOLOGY,HYDERABAD

Enrollment Statistics

Total Enrollment: 5680

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Assignment Statistics




Assignment

Exam score

Final score

Score Distribution Graph - Legend

Assignment Score: Distribution of average scores garnered by students per assignment.
Exam Score : Distribution of the final exam score of students.
Final Score : Distribution of the combined score of assignments and final exam, based on the score logic.