1 | L1-Historical Perspective and Future Trends in CMOS VLSI Circuit and System Design | PDF unavailable |
2 | L2-Historical Perspective and Future Trends in CMOS VLSI Circuit and System Design - Part II | PDF unavailable |
3 | L3-Logical Effort - A way of Designing Fast CMOS Circuits | PDF unavailable |
4 | L4-Logical Effort - A way of Designing Fast CMOS Circuits continued | PDF unavailable |
5 | L5-Logical Effort - A way of Designing Fast CMOS Circuits -Part III | PDF unavailable |
6 | L6-Power Estimation and Control in CMOS VLSI circuits | PDF unavailable |
7 | L7-Power Estimation and Control in CMOS VLSI circuits continued | PDF unavailable |
8 | L8-Low Power Design Techniques | PDF unavailable |
9 | L9-Low Power Design Techniques -Part II | PDF unavailable |
10 | L10-Arithmetic Implementation Strategies for VLSI | PDF unavailable |
11 | L11-Arithmetic Implementation Strategies for VLSI -Part II | PDF unavailable |
12 | L12-Arithmetic Implementation Strategies for VLSI -Part III | PDF unavailable |
13 | L13-Arithmetic Implementation Strategies for VLSI -Part IV | PDF unavailable |
14 | L14-Interconnect aware design: Impact of scaling, buffer insertion and inductive peaking | PDF unavailable |
15 | L15-Interconnect aware design: Low swing and Current mode signaling | PDF unavailable |
16 | L16-Interconnect aware design: capacitively coupled interconnects | PDF unavailable |
17 | L17-Introduction to Hardware Description Languages | PDF unavailable |
18 | L18-Managing concurrency and time in Hardware Description Languages | PDF unavailable |
19 | L19-Introduction to VHDL | PDF unavailable |
20 | L20-Basic Components in VHDL | PDF unavailable |
21 | L21-Structural Description in VHDL | PDF unavailable |
22 | L22-Behavioral Description in VHDL | PDF unavailable |
23 | L23-Introduction to Verilog | PDF unavailable |
24 | L24-FSM + datapath (GCD example) | PDF unavailable |
25 | L25-FSM + datapath (continued) | PDF unavailable |
26 | L26-Single Cycle MMIPS | PDF unavailable |
27 | L27-Multicycle MMIPS | PDF unavailable |
28 | L28-Multicycle MMIPS – FSM | PDF unavailable |
29 | L29-Brief Overview of Basic VLSI Design Automation Concepts | PDF unavailable |
30 | L30-Netlist and System Partitioning | PDF unavailable |
31 | L31-Timing Analysis in the context of Physical Design Automation | PDF unavailable |
32 | L32-Placement algorithm | PDF unavailable |
33 | L33-Introduction to VLSI Testing | PDF unavailable |
34 | L34-VLSI Test Basics - I | PDF unavailable |
35 | L35-VLSI Test Basics - II | PDF unavailable |
36 | L36-VLSI Testing: Automatic Test Pattern Generation | PDF unavailable |
37 | L37-VLSI Testing: Design for Test (DFT) | PDF unavailable |
38 | L38-VLSI Testing: Built-In Self-Test (BIST) | PDF unavailable |
39 | L39-VLSI Design Verification: An Introduction | PDF unavailable |
40 | L40-VLSI Design Verification: An Introduction | PDF unavailable |
41 | L41-VLSI Design Verification: Equivalence/Model Checking | PDF unavailable |
42 | L42-VLSI Design Verification: Model Checking | PDF unavailable |