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Module 3 : Fabrication Process and Layout Design Rules

Lecture 13 : Layout Design Rules

13.1 Motivation

In VLSI design, as processes become more and more complex, need for the designer to understand the intricacies of the fabrication process and interpret the relations between the different photo masks is really trouble some. Therefore, a set of layout rules, also called design rules, has been defined. They act as an interface or communication link between the circuit designer and the process engineer during the manufacturing phase. The objective associated with layout rules is to obtain a circuit with optimum yield (functional circuits versus non-functional circuits) in as small as area possible without compromising reliability of the circuit. In addition, Design rules can be conservative or aggressive, depending on whether yield or performance is desired. Generally, they are a compromise between the two. Manufacturing processes have their inherent limitations in accuracy. So the need of design rules arises due to manufacturing problems like -

Photo resist shrinkage, tearing.

Variations in material deposition, temperature and oxide thickness.

Impurities.

Variations across a wafer.

These lead to various problems like :

Transistor problems:
    Variations in threshold voltage: This may occur due to variations in
    oxide thickness, ion-implantation and poly layer.
    Changes in source/drain diffusion overlap.
    Variations in substrate.

  Wiring problems:
    Diffusion: There is variation in doping which results in variations in
    resistance, capacitance.
    Poly, metal: Variations in height, width resulting in variations in
    resistance, capacitance.
    Shorts and opens.

Oxide problems:
Variations in height.
Lack of planarity.

  Via problems:
    Via may not be cut all the way through.
    Undersize via has too much resistance.
    Via may be too large and create short.

To reduce these problems, the design rules specify to the designer certain geometric constraints on the layout artwork so that the patterns on the processed wafers will preserve the topology and geometry of the designs. This consists of minimum-width
and minimum-spacing constraints and requirements between objects on the same or different layers. Apart from following a definite set of rules, design rules also come by experience.