VA to PA Translation

• Accessing the page table
  • The Page table base register (PTBR) contains the starting physical address of the page table
  • PTBR is normally accessible in the kernel mode only
  • Assume each entry in page table is 32 bits (4 bytes)
  • Thus the required page table address is PTBR + (VPN << 2)
  • Access memory at this address to get 32 bits of data from the page table entry (PTE)
  • These 32 bits contain many things: a valid bit, the much needed PPFN (may be 20 bits for a 4 GB physical memory), access permissions (read, write, execute), a dirty/modified bit etc.

Page Fault

• The valid bit within the 32 bits tells you if the translation is valid
• If this bit is reset that means the page is not resident in memory: results in a page fault
• In case of a page fault the kernel needs to bring in the page to memory from disk
• The disk address is normally provided by the page table entry (different interpretation of 31 bits)
• Also kernel needs to allocate a new physical page frame for this virtual page
• If all frames are occupied it invokes a page replacement policy