Module 9: Addendum to Module 6: Shared Memory Multiprocessors
  Lecture 18: Sharing Patterns and Cache Coherence Protocols
 


States of a Cache Line

  • Invalid (I), Shared (S), Modified or dirty (M), Clean exclusive (E), Owned (O)
    • Every processor does not support all five states
    • E state is equivalent to M in the sense that the line has permission to write, but in E state the line is not yet modified and the copy in memory is the same as in cache; if someone else requests the line the memory will provide the line
    • O state is exactly same as E state but in this case memory is not responsible for servicing requests to the line; the owner must supply the line (just as in M state)

Stores

  • Look at stores a little more closely
    • There are three situations at the time a store issues: the line is not in the cache, the line is in the cache in S state, the line is in the cache in one of M, E and O states
    • If the line is in I state, the store generates a read-exclusive request on the bus and gets the line in M state
    • If the line is in S or O state, that means the processor only has read permission for that line; the store generates an upgrade request on the bus and the upgrade acknowledgment gives it the write permission (this is a data-less transaction)