Module 10: "Design of Shared Memory Multiprocessors"
  Lecture 18: "Introduction to Cache Coherence"
 


Shared Memory Multiprocessors

Four organizations

Hierarchical design

Cache Coherence

Example

What went wrong?

Definitions

Ordering memory op

Example

Cache coherence

Bus-based SMP

Snoopy protocols

Write through caches

State transition

Ordering memory op

Write through is bad

[From Chapter 5 of Culler, Singh, Gupta]