In this discussion, we have presented a simplified view of the way in which the sequence of control signals needed to fetch and execute instructions may be generated.
It is observed from the discussion that as the number of instruction increases the number of required control signals will also increase.
In VLSI technology, structure that involve regular interconnection patterns are much easier to implement than the random connections.
One such regular structure is PLA ( programmable logic array ). PLAs are nothing but the arrays of AND gates followed by array of OR gates. If the control signals are expressed as sum of product form then with the help of PLA it can be implemented.
The PLA implementation of control unit is shown in the Figure 5.16.