| 1 | Types of computer Architectures, ISA's and ARM History | PDF unavailable |
| 2 | Embedded System Software and Hardware, stack implementation in ARM, Endianness, condition codes | PDF unavailable |
| 3 | Processor core VS CPU core, ARM7TDMI Interface signals, Memory Interface, Bus Cycle types, Register set, Operational Modes | PDF unavailable |
| 4 | Instruction Format, ARM Core Data Flow Model, ARM 3 stage Pipeline, ARM family attribute comparision | PDF unavailable |
| 5 | ARM 5 stage Pipeline, Pipeline Hazards, Data forwarding - a hardware solution | PDF unavailable |
| 6 | ARM ISA and Processor Variants, Different Types of Instructions, ARM Instruction set, data processing instructions | PDF unavailable |
| 7 | Shift Operations, shift Operations using RS lower byte, Immediate value encoding | PDF unavailable |
| 8 | Dataprocessing Instructions | PDF unavailable |
| 9 | AddressingMode-1, Addressing Mode -2 | PDF unavailable |
| 10 | Addressing Mode -2, LDR/STR, Addressing mode -3 with examples | PDF unavailable |
| 11 | Instruction Timing, Addressing Mode - 4 with Examples | PDF unavailable |
| 12 | Swap Instructions, Swap Register related Instructions, Loading Constants | PDF unavailable |
| 13 | Program Control Flow, Control Flow Instructions, B & BL instructions, BX instruction | PDF unavailable |
| 14 | Interrupts and Exceptions, Exception Handlers, Reset Handling | PDF unavailable |
| 15 | Aborts, software Interrupt Instruction, undefined instruction exception | PDF unavailable |
| 16 | Interrupt Latency, Multiply Instructions, Instruction set examples | PDF unavailable |
| 17 | Thumb state, Thumb Programmers model, Thumb Implementation, Thumb Applications | PDF unavailable |
| 18 | Thumb Instructions, Interrupt processing | PDF unavailable |
| 19 | Interrupt Handelling schemes, Examples of Interrupt Handlers | PDF unavailable |
| 20 | Coprocessors | PDF unavailable |
| 21 | Coprocessor Instructions, data Processign Instruction, data transfers, register transfers | PDF unavailable |
| 22 | Number representations, floating point representation | PDF unavailable |
| 23 | Flynn's Taxonomy, SIMD and Vector Processors, Vector Floating Point Processor (VFP), VFP and ARM interactions, An example vector operation | PDF unavailable |
| 24 | Memory Technologies, Need for memory Hierarchy, Hierarchical Memory Organization, Virtual Memory | PDF unavailable |
| 25 | Cache Memory, Mapping Functions | PDF unavailable |
| 26 | Cache Design, Unified or split cache, multiple level of caches, ARM cache features, coprocessor 15 for system control | PDF unavailable |
| 27 | Processes, Memory Map, Protected Systems, ARM systems with MPU, memory Protection Unit (MPU) | PDF unavailable |
| 28 | Physical Vs Virtual Memory, Paging, Segmentation | PDF unavailable |
| 29 | MMU Advantage, virtual memory translation, Multitasking with MMU, MMU organization, Tightly coupled Memory (TCM) | PDF unavailable |
| 30 | ARM Development Environment, Arm Procedure Call Standard (APCS), | PDF unavailable |
| 31 | Example C program | PDF unavailable |
| 32 | Embedded software Development, Image structure, linker inputs and outputs, memory map, application startup | PDF unavailable |
| 33 | AMBA Overview, Typical AMAB Based Microcontroller, AHB bus features, AHB Bus transfers, APB bus transfers, APB bridge | PDF unavailable |
| 34 | DMA, Peripherals, Programming Peripherals in ARM | PDF unavailable |
| 35 | DMA:Direct Memory Access | PDF unavailable |
| 36 | Protocols (I2c, SPI), UART, GPIO | PDF unavailable |
| 37 | ARM ISAs, ARMv5, ARMv6, ARM v7, big.little technology, ARMv8 | PDF unavailable |