| Sl.No | Chapter Name | English |
|---|---|---|
| 1 | Introduction To Digital Circuits | Download To be verified |
| 2 | Introduction To Digital Circuits | Download To be verified |
| 3 | Combinational Logic Basics | Download To be verified |
| 4 | Combinational Circuits | Download To be verified |
| 5 | Logic Simplification | Download To be verified |
| 6 | Karnaugh Maps And Implicants | Download To be verified |
| 7 | Logic Minimization Using Karnaugh Maps | Download To be verified |
| 8 | Karnaugh Map Minimization Using Maxterms | Download To be verified |
| 9 | Code Converters | Download To be verified |
| 10 | Parity Generators And Display Decoder | Download To be verified |
| 11 | Arithmetic Circuits | Download To be verified |
| 12 | Carry Look Ahead Adders | Download To be verified |
| 13 | Subtractors | Download To be verified |
| 14 | 2?'S Complement Subtractor and BCD Adder | Download To be verified |
| 15 | Array Multiplier | Download To be verified |
| 16 | Introduction to Sequential Circuits | Download To be verified |
| 17 | S-R, J-K and D Flip Flops | Download To be verified |
| 18 | J-K and T Flip Flops | Download To be verified |
| 19 | Triggering Mechanisms of Flip Flops and Counters | Download To be verified |
| 20 | Up/ Down Counters | Download To be verified |
| 21 | Shift Registers | Download To be verified |
| 22 | Application of shift Registers | Download To be verified |
| 23 | State Machines | Download To be verified |
| 24 | Design of Synchronous Sequential Circuits | Download To be verified |
| 25 | Design using J-K Flip Flop | Download To be verified |
| 26 | Mealy and Moore Circuits | Download To be verified |
| 27 | Pattern Detector | Download To be verified |
| 28 | MSI and LSI Based Design | Download To be verified |
| 29 | Multiplexer Based Design | Download To be verified |
| 30 | Encoders and Decoders | Download To be verified |
| 31 | Programmable Logic Devices | Download To be verified |
| 32 | Design using Programmable Logic Devices | Download To be verified |
| 33 | Design using Programmable Logic Devices (contd) | Download To be verified |
| 34 | MSI and LSI based Implementation of Sequential Circuits | Download To be verified |
| 35 | MSI and LSI based Implementation of Sequential Circuits (contd) | Download To be verified |
| 36 | Design of circuits using MSI sequential blocks | Download To be verified |
| 37 | System Design Example | Download To be verified |
| 38 | System Design Example (contd) | Download To be verified |
| 39 | System Design using the concept of controllers | Download To be verified |
| 40 | System Design using the concept of controllers (contd) | Download To be verified |
| Sl.No | Language | Book link |
|---|---|---|
| 1 | English | Not Available |
| 2 | Bengali | Not Available |
| 3 | Gujarati | Not Available |
| 4 | Hindi | Not Available |
| 5 | Kannada | Not Available |
| 6 | Malayalam | Not Available |
| 7 | Marathi | Not Available |
| 8 | Tamil | Not Available |
| 9 | Telugu | Not Available |