Modules / Lectures


Sl.No Chapter Name MP4 Download
1Course Introduction and Motivation Part IDownload
2Course Introduction and Motivation Part IIDownload
3Basic Operation of a Phase Locked LoopDownload
4Simple Implementation of a Phase Locked LoopDownload
5Input Output Characteristics of Basic PLL BlocksDownload
6Time Domain Analysis of a Simple PLLDownload
7Time Domain Versus Small Signal Analysis of a Simple PLLDownload
8Type and Order of PLLDownload
9Small Signal Analysis of Type-I/II/III PLLs for Phase Step, Frequency Step and Frequency RampDownload
10Frequency Acquisition Range for PLLsDownload
11Frequency Acquisition in Type-I PLLsDownload
12Frequency Acquisition Limits in Type-I PLLsDownload
13Frequency Acquisition in Type II PLLsDownload
14Frequency Acquisition Ranges in Type II PLLs with Ideal and Non Ideal IntegratorDownload
15Frequency Domain Insight in Frequency Acquisition for Type II PLLsDownload
16Introduction to Clock MultipliersDownload
17Analog Phase Error Detectors: Part IDownload
18Analog Phase Error Detectors: Part IIDownload
19Digital Phase Error Detectors: Part IDownload
20Digital Phase Error Detectors: Part IIDownload
21Range Extension for Phase Error DetectorsDownload
22Phase Frequency DetectorDownload
23Digital Frequency DetectorDownload
24Charge Pump PLLDownload
25Small Signal and Stability Analysis of Type II Order 2 Charge Pump PLLDownload
26Problems in Charge Pump PLL - Dead Zone in PFDDownload
27Problems in Charge Pump PLL - Reference SpurDownload
28Design Procedure for Type-II Order 3 Charge Pump PLLDownload
29Design Procedure for Charge Pump Clock MultiplierDownload
30Sources of Non-Linearities in CP-PLL: Part IDownload
31Sources of Non-Linearities in CP-PLL: Part IIDownload
32Noise Analysis in CP-PLL: Part IDownload
33Noise Analysis in CP PLL: Part IIDownload
34Noise Analysis in CP-PLL: Part IIIDownload
35Noise Simulations for CP-PLL BlocksDownload
36Introduction to OscillatorsDownload
37Low Swing Ring Oscillator: Part IDownload
38Low-Swing Ring Oscillator: Part IIDownload
39Large-Swing Ring Oscillator: Part IDownload
40Large-Swing Ring Oscillator: Part IIDownload
41Large-Swing Ring Oscillator: Part IIIDownload
42Large-Swing Ring Oscillator: Part IVDownload
43Large-Swing Ring Oscillator: Part VDownload
44Supply Regulated VCO: Part IDownload
45Supply Regulated VCO: Part IIDownload
46Supply Regulated VCO: Part IIIDownload
47Phase Noise in Ring OscillatorsDownload
48Circuit level Design of PFD: Part IDownload
49Circuit level Design of PFD: Part IIDownload
50Circuit level Design of PFD: Part IIIDownload
51Circuit level Design of Charge Pump: Part IDownload
52Circuit-level Design of Charge Pump: Part IIDownload
53Circuit-level Design of Charge Pump: Part IIIDownload
54Circuit-level Design of Charge Pump: Part IVDownload
55Circuit-level Design of Charge Pump: Part VDownload
56Circuit-level Design of Charge Pump: Part VIDownload
57Circuit-level Design of Clock Frequency DividerDownload

Sl.No Chapter Name English
1Course Introduction and Motivation Part IDownload
Verified
2Course Introduction and Motivation Part IIDownload
Verified
3Basic Operation of a Phase Locked LoopDownload
Verified
4Simple Implementation of a Phase Locked LoopDownload
Verified
5Input Output Characteristics of Basic PLL BlocksDownload
Verified
6Time Domain Analysis of a Simple PLLDownload
Verified
7Time Domain Versus Small Signal Analysis of a Simple PLLDownload
Verified
8Type and Order of PLLDownload
Verified
9Small Signal Analysis of Type-I/II/III PLLs for Phase Step, Frequency Step and Frequency RampDownload
Verified
10Frequency Acquisition Range for PLLsDownload
Verified
11Frequency Acquisition in Type-I PLLsDownload
Verified
12Frequency Acquisition Limits in Type-I PLLsDownload
Verified
13Frequency Acquisition in Type II PLLsDownload
Verified
14Frequency Acquisition Ranges in Type II PLLs with Ideal and Non Ideal IntegratorDownload
Verified
15Frequency Domain Insight in Frequency Acquisition for Type II PLLsDownload
Verified
16Introduction to Clock MultipliersDownload
Verified
17Analog Phase Error Detectors: Part IDownload
Verified
18Analog Phase Error Detectors: Part IIDownload
Verified
19Digital Phase Error Detectors: Part IDownload
Verified
20Digital Phase Error Detectors: Part IIDownload
Verified
21Range Extension for Phase Error DetectorsDownload
Verified
22Phase Frequency DetectorDownload
Verified
23Digital Frequency DetectorDownload
Verified
24Charge Pump PLLDownload
Verified
25Small Signal and Stability Analysis of Type II Order 2 Charge Pump PLLDownload
Verified
26Problems in Charge Pump PLL - Dead Zone in PFDDownload
Verified
27Problems in Charge Pump PLL - Reference SpurDownload
Verified
28Design Procedure for Type-II Order 3 Charge Pump PLLDownload
Verified
29Design Procedure for Charge Pump Clock MultiplierDownload
Verified
30Sources of Non-Linearities in CP-PLL: Part IDownload
Verified
31Sources of Non-Linearities in CP-PLL: Part IIDownload
Verified
32Noise Analysis in CP-PLL: Part IDownload
Verified
33Noise Analysis in CP PLL: Part IIPDF unavailable
34Noise Analysis in CP-PLL: Part IIIPDF unavailable
35Noise Simulations for CP-PLL BlocksPDF unavailable
36Introduction to OscillatorsPDF unavailable
37Low Swing Ring Oscillator: Part IPDF unavailable
38Low-Swing Ring Oscillator: Part IIPDF unavailable
39Large-Swing Ring Oscillator: Part IPDF unavailable
40Large-Swing Ring Oscillator: Part IIPDF unavailable
41Large-Swing Ring Oscillator: Part IIIPDF unavailable
42Large-Swing Ring Oscillator: Part IVPDF unavailable
43Large-Swing Ring Oscillator: Part VPDF unavailable
44Supply Regulated VCO: Part IPDF unavailable
45Supply Regulated VCO: Part IIPDF unavailable
46Supply Regulated VCO: Part IIIPDF unavailable
47Phase Noise in Ring OscillatorsPDF unavailable
48Circuit level Design of PFD: Part IPDF unavailable
49Circuit level Design of PFD: Part IIPDF unavailable
50Circuit level Design of PFD: Part IIIPDF unavailable
51Circuit level Design of Charge Pump: Part IPDF unavailable
52Circuit-level Design of Charge Pump: Part IIPDF unavailable
53Circuit-level Design of Charge Pump: Part IIIPDF unavailable
54Circuit-level Design of Charge Pump: Part IVPDF unavailable
55Circuit-level Design of Charge Pump: Part VPDF unavailable
56Circuit-level Design of Charge Pump: Part VIPDF unavailable
57Circuit-level Design of Clock Frequency DividerPDF unavailable


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2BengaliNot Available
3GujaratiNot Available
4HindiNot Available
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6MalayalamNot Available
7MarathiNot Available
8TamilNot Available
9TeluguNot Available