Modules / Lectures
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noc20_ee44_assigment_7noc20_ee44_assigment_7
noc20_ee44_assigment_8noc20_ee44_assigment_8


Sl.No Chapter Name MP4 Download
1Lecture 01: Graphical Representation of SignalsDownload
2Lecture 02 : Signal Flow GraphDownload
3Lecture 03: Data Flow Graph, Critical PathDownload
4Lecture 04: Dependence Graph, Basics of RetimingDownload
5Lecture 05: Retiming TheoremDownload
6Lecture 6 : Forward Path and Loop RetimingDownload
7Lecture 7 : Loop Bound and Iteration BoundDownload
8Lecture 8 : Cutset RetimingDownload
9Lecture 9 : Retiming IIR FiltersDownload
10Lecture 10 : Adaptive Filter Basics (LMS Algorithm)Download
11Lecture 11 : Retiming LMSDownload
12Lecture 12 : Retiming Delayed LMSDownload
13Lecture 13 : Parallel Processing in DSP by UnfoldingDownload
14Lecture 14 : Basic Unfolding RelationDownload
15Lecture 15 : Retiming for UnfoldingDownload
16Lecture 16 : Loop UnfoldingDownload
17Lecture 17 : Iteration bound for LoopsDownload
18Lecture 18 : Bitserial, Digit serial and Word serial StructuresDownload
19Lecture 19 : Unfolding a SwitchDownload
20Lecture 20 : Unfolding Bit Serial SystemsDownload
21Lecture 21 : Folding of DFGDownload
22Lecture 22 : Folding Examples - IIR FilterDownload
23Lecture 23 : Retiming for FoldingDownload
24Lecture 24 : Introduction to Delay Optimization by FoldingDownload
25Lecture 25 : Life Time Analysis of Storage VariablesDownload
26Lecture 26 : Foward Backward Data AllocationDownload
27Lecture 27 : Life Time Analysis of Storage Variables in a Digital FilterDownload
28Lecture 28 : Delay Folded Realization of a Digital FilterDownload
29Lecture 29 : Polyphase Decomposition of SequencesDownload
30Lecture 30 : Hardware Efficient 2-Parallel FIR FiltersDownload
31Lecture 31 : Hardware Efficient 3-Parallel FIR FiltersDownload
32Lecture 32 : Introduction to First Level ArchitecturesDownload
33Lecture 33 : 2's Complement Number SystemsDownload
34Lecture 34 : Multiplication of Two Binary NumbersDownload
35Lecture 35 : Carry Ripple and Carry Save ArrayDownload
36Lecture 36: Bit Serial MultipliersDownload
37Lecture 37: Bit Serial Digital FiltersDownload
38Lecture 38: Baugh Wooley MultiplierDownload
39Lecture 39: Distributed ArithmeticDownload

Sl.No Chapter Name English
1Lecture 01: Graphical Representation of SignalsDownload
Verified
2Lecture 02 : Signal Flow GraphDownload
Verified
3Lecture 03: Data Flow Graph, Critical PathDownload
Verified
4Lecture 04: Dependence Graph, Basics of RetimingDownload
Verified
5Lecture 05: Retiming TheoremDownload
Verified
6Lecture 6 : Forward Path and Loop RetimingDownload
Verified
7Lecture 7 : Loop Bound and Iteration BoundDownload
Verified
8Lecture 8 : Cutset RetimingDownload
Verified
9Lecture 9 : Retiming IIR FiltersDownload
Verified
10Lecture 10 : Adaptive Filter Basics (LMS Algorithm)Download
Verified
11Lecture 11 : Retiming LMSDownload
Verified
12Lecture 12 : Retiming Delayed LMSDownload
Verified
13Lecture 13 : Parallel Processing in DSP by UnfoldingDownload
Verified
14Lecture 14 : Basic Unfolding RelationDownload
Verified
15Lecture 15 : Retiming for UnfoldingDownload
Verified
16Lecture 16 : Loop UnfoldingDownload
Verified
17Lecture 17 : Iteration bound for LoopsDownload
Verified
18Lecture 18 : Bitserial, Digit serial and Word serial StructuresDownload
Verified
19Lecture 19 : Unfolding a SwitchDownload
Verified
20Lecture 20 : Unfolding Bit Serial SystemsDownload
Verified
21Lecture 21 : Folding of DFGDownload
Verified
22Lecture 22 : Folding Examples - IIR FilterDownload
Verified
23Lecture 23 : Retiming for FoldingDownload
Verified
24Lecture 24 : Introduction to Delay Optimization by FoldingDownload
Verified
25Lecture 25 : Life Time Analysis of Storage VariablesDownload
Verified
26Lecture 26 : Foward Backward Data AllocationDownload
Verified
27Lecture 27 : Life Time Analysis of Storage Variables in a Digital FilterDownload
Verified
28Lecture 28 : Delay Folded Realization of a Digital FilterDownload
Verified
29Lecture 29 : Polyphase Decomposition of SequencesDownload
Verified
30Lecture 30 : Hardware Efficient 2-Parallel FIR FiltersDownload
Verified
31Lecture 31 : Hardware Efficient 3-Parallel FIR FiltersDownload
Verified
32Lecture 32 : Introduction to First Level ArchitecturesDownload
Verified
33Lecture 33 : 2's Complement Number SystemsDownload
Verified
34Lecture 34 : Multiplication of Two Binary NumbersDownload
Verified
35Lecture 35 : Carry Ripple and Carry Save ArrayDownload
Verified
36Lecture 36: Bit Serial MultipliersDownload
Verified
37Lecture 37: Bit Serial Digital FiltersDownload
Verified
38Lecture 38: Baugh Wooley MultiplierDownload
Verified
39Lecture 39: Distributed ArithmeticDownload
Verified


Sl.No Language Book link
1EnglishDownload
2BengaliNot Available
3GujaratiNot Available
4HindiNot Available
5KannadaNot Available
6MalayalamNot Available
7MarathiNot Available
8TamilNot Available
9TeluguNot Available