Modules / Lectures

Sl.No Chapter Name English
1Lecture 1 : Introduction to VLSI Design FlowDownload
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2Lecture 2 : Introduction to VLSI Design FlowDownload
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3Lecture 3 : Introduction to VLSI Design FlowDownload
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4Lecture 4 : Algorithm to Efficient Architecture MappingDownload
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5Lecture 5 : Algorithm to Efficient Architecture Mapping(Contd.)Download
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6Lecture 6 : Algorithm to Efficient Architecture Mapping(Contd.Download
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7Lecture 7 : Tutorial on Algorithm to Efficient Architecture MappingDownload
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8Lecture 8 : Algorithm to Efficient Architecture Mapping(Contd.Download
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9Lecture 9 : Algorithm to Efficient Architecture Mapping(Contd.Download
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10Lecture 10 : Algorithm to Efficient Architecture Mapping(Contd.Download
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11Lecture 11 : Algorithm to Efficient Architecture Mapping(Contd.Download
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12Lecture 12 : Algorithm to Efficient Architecture Mapping(Contd.Download
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13Lecture 13 : Algorithm to Efficient Architecture MappingDownload
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14Lecture 14 : Algorithm to Efficient Architecture Mapping(Contd.)Download
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15Lecture 15 : Efficient Adder ArchitectureDownload
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16Lecture 16 : Efficient Adder Architecture (Contd.)Download
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17Lecture 17 : Efficient Adder Architecture (Contd.)Download
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18Lecture 18 : Efficient Adder ArchitectureDownload
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19Lecture 19 : Efficient Adder ArchitectureDownload
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20Lecture 20 : Efficient Adder ArchitectureDownload
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21Lecture 21 : Efficient Adder ArchitectureDownload
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22Lecture 22 : Efficient Adder ArchitectureDownload
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23Lecture 23 : Efficient Adder ArchitectureDownload
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24Lecture 24 : Efficient Adder ArchitectureDownload
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25Lecture 25 : Pipelining and Parallel ProcessingDownload
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26Lecture 26 : Pipelining and Parallel ProcessingDownload
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27Lecture 27 : Multiplier ArchitectureDownload
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28Lecture 28 : Multiplier ArchitectureDownload
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29Lecture 29 : Multiplier ArchitectureDownload
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30Lecture 30 : Multiplier ArchitectureDownload
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31Lecture 31: Multiplier ArchitectureDownload
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32Lecture 32: Multiplier ArchitectureDownload
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33Lecture 33: Multiplier ArchitectureDownload
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34Lecture 34: Multiplier ArchitectureDownload
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35Lecture 35: Squaring Circuit DesignDownload
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36Lecture 36: Reconfigurable Constant Multiplier DesignDownload
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37Lecture 37 : Reconfigurable Constant Multiplier DesignDownload
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38Lecture 38 : Reconfigurable Constant Multiplier DesignDownload
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39Lecture 39 : Fixed Point Number RepresentationDownload
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40Lecture 40 : Fixed Point Number RepresentationDownload
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41Lecture 41 : CORDIC ArchitectureDownload
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42Lecture 42 : CORDIC ArchitectureDownload
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43Lecture 43 : CORDIC ArchitectureDownload
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44Lecture 44 : CORDIC ArchitectureDownload
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45Lecture 45 : Timing AnalysisDownload
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46Lecture 46 : Timing AnalysisDownload
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47Lecture 47 : Timing AnalysisDownload
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48Lecture 48 : Logic HazardDownload
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49Lecture 49: FFT ArchitectureDownload
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50Lecture 50: FFT Architecture (Contd.)Download
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51Lecture 51: Timing analysis BasicsDownload
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52Lecture 52: Timing analysis Basics (Contd.)Download
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53Lecture 53: Timing analysis Basics (Contd.)Download
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54Lecture 54: Timing Issuesin Digital IC DesignDownload
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55Lecture 55: Timing Issuesin Digital IC Design (Contd.)Download
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56Lecture 56: Timing Issuesin Digital IC Design (Contd.)Download
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57Lecture 57: Timing Issuesin Digital IC Design (Contd.)Download
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58Lecture 58: Architectural Design of Digital Integrated CircuitsDownload
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59Lecture 59: Design Tips for Basic Circuits Design ( Contd. )Download
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60Lecture 60: Design Tips for Basic Circuits Design ( Contd. )Download
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61Lecture 61: Design Tips for Basic Circuits Design ( Contd. )Download
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62Lecture 62: Low Power Digital DesignDownload
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63Lecture 63: Low Power Digital Design ( Contd. )Download
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64Lecture 64: Low Power Digital Design Download
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65Lecture 65: Low Power Digital Design ( Contd. )Download
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66Lecture 66: Hardware for Machine Learning : Design Considerations Design TipsDownload
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67Lecture 67: Hardware for Machine Learning : Design Considerations Design Tips ( Contd. )Download
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1EnglishDownload
2BengaliNot Available
3GujaratiNot Available
4HindiNot Available
5KannadaNot Available
6MalayalamNot Available
7MarathiNot Available
8TamilNot Available
9TeluguNot Available