| Sl.No | Chapter Name | MP4 Download |
|---|---|---|
| 1 | Lecture 1 : Introduction to VLSI Design Flow | Download |
| 2 | Lecture 2 : Introduction to VLSI Design Flow | Download |
| 3 | Lecture 3 : Introduction to VLSI Design Flow | Download |
| 4 | Lecture 4 : Algorithm to Efficient Architecture Mapping | Download |
| 5 | Lecture 5 : Algorithm to Efficient Architecture Mapping(Contd.) | Download |
| 6 | Lecture 6 : Algorithm to Efficient Architecture Mapping(Contd. | Download |
| 7 | Lecture 7 : Tutorial on Algorithm to Efficient Architecture Mapping | Download |
| 8 | Lecture 8 : Algorithm to Efficient Architecture Mapping(Contd. | Download |
| 9 | Lecture 9 : Algorithm to Efficient Architecture Mapping(Contd. | Download |
| 10 | Lecture 10 : Algorithm to Efficient Architecture Mapping(Contd. | Download |
| 11 | Lecture 11 : Algorithm to Efficient Architecture Mapping(Contd. | Download |
| 12 | Lecture 12 : Algorithm to Efficient Architecture Mapping(Contd. | Download |
| 13 | Lecture 13 : Algorithm to Efficient Architecture Mapping | Download |
| 14 | Lecture 14 : Algorithm to Efficient Architecture Mapping(Contd.) | Download |
| 15 | Lecture 15 : Efficient Adder Architecture | Download |
| 16 | Lecture 16 : Efficient Adder Architecture (Contd.) | Download |
| 17 | Lecture 17 : Efficient Adder Architecture (Contd.) | Download |
| 18 | Lecture 18 : Efficient Adder Architecture | Download |
| 19 | Lecture 19 : Efficient Adder Architecture | Download |
| 20 | Lecture 20 : Efficient Adder Architecture | Download |
| 21 | Lecture 21 : Efficient Adder Architecture | Download |
| 22 | Lecture 22 : Efficient Adder Architecture | Download |
| 23 | Lecture 23 : Efficient Adder Architecture | Download |
| 24 | Lecture 24 : Efficient Adder Architecture | Download |
| 25 | Lecture 25 : Pipelining and Parallel Processing | Download |
| 26 | Lecture 26 : Pipelining and Parallel Processing | Download |
| 27 | Lecture 27 : Multiplier Architecture | Download |
| 28 | Lecture 28 : Multiplier Architecture | Download |
| 29 | Lecture 29 : Multiplier Architecture | Download |
| 30 | Lecture 30 : Multiplier Architecture | Download |
| 31 | Lecture 31: Multiplier Architecture | Download |
| 32 | Lecture 32: Multiplier Architecture | Download |
| 33 | Lecture 33: Multiplier Architecture | Download |
| 34 | Lecture 34: Multiplier Architecture | Download |
| 35 | Lecture 35: Squaring Circuit Design | Download |
| 36 | Lecture 36: Reconfigurable Constant Multiplier Design | Download |
| 37 | Lecture 37 : Reconfigurable Constant Multiplier Design | Download |
| 38 | Lecture 38 : Reconfigurable Constant Multiplier Design | Download |
| 39 | Lecture 39 : Fixed Point Number Representation | Download |
| 40 | Lecture 40 : Fixed Point Number Representation | Download |
| 41 | Lecture 41 : CORDIC Architecture | Download |
| 42 | Lecture 42 : CORDIC Architecture | Download |
| 43 | Lecture 43 : CORDIC Architecture | Download |
| 44 | Lecture 44 : CORDIC Architecture | Download |
| 45 | Lecture 45 : Timing Analysis | Download |
| 46 | Lecture 46 : Timing Analysis | Download |
| 47 | Lecture 47 : Timing Analysis | Download |
| 48 | Lecture 48 : Logic Hazard | Download |
| 49 | Lecture 49: FFT Architecture | Download |
| 50 | Lecture 50: FFT Architecture (Contd.) | Download |
| 51 | Lecture 51: Timing analysis Basics | Download |
| 52 | Lecture 52: Timing analysis Basics (Contd.) | Download |
| 53 | Lecture 53: Timing analysis Basics (Contd.) | Download |
| 54 | Lecture 54: Timing Issuesin Digital IC Design | Download |
| 55 | Lecture 55: Timing Issuesin Digital IC Design (Contd.) | Download |
| 56 | Lecture 56: Timing Issuesin Digital IC Design (Contd.) | Download |
| 57 | Lecture 57: Timing Issuesin Digital IC Design (Contd.) | Download |
| 58 | Lecture 58: Architectural Design of Digital Integrated Circuits | Download |
| 59 | Lecture 59: Design Tips for Basic Circuits Design ( Contd. ) | Download |
| 60 | Lecture 60: Design Tips for Basic Circuits Design ( Contd. ) | Download |
| 61 | Lecture 61: Design Tips for Basic Circuits Design ( Contd. ) | Download |
| 62 | Lecture 62: Low Power Digital Design | Download |
| 63 | Lecture 63: Low Power Digital Design ( Contd. ) | Download |
| 64 | Lecture 64: Low Power Digital Design | Download |
| 65 | Lecture 65: Low Power Digital Design ( Contd. ) | Download |
| 66 | Lecture 66: Hardware for Machine Learning : Design Considerations Design Tips | Download |
| 67 | Lecture 67: Hardware for Machine Learning : Design Considerations Design Tips ( Contd. ) | Download |
| Sl.No | Chapter Name | English |
|---|---|---|
| 1 | Lecture 1 : Introduction to VLSI Design Flow | Download Verified |
| 2 | Lecture 2 : Introduction to VLSI Design Flow | Download Verified |
| 3 | Lecture 3 : Introduction to VLSI Design Flow | Download Verified |
| 4 | Lecture 4 : Algorithm to Efficient Architecture Mapping | Download Verified |
| 5 | Lecture 5 : Algorithm to Efficient Architecture Mapping(Contd.) | Download Verified |
| 6 | Lecture 6 : Algorithm to Efficient Architecture Mapping(Contd. | Download Verified |
| 7 | Lecture 7 : Tutorial on Algorithm to Efficient Architecture Mapping | Download Verified |
| 8 | Lecture 8 : Algorithm to Efficient Architecture Mapping(Contd. | Download Verified |
| 9 | Lecture 9 : Algorithm to Efficient Architecture Mapping(Contd. | Download Verified |
| 10 | Lecture 10 : Algorithm to Efficient Architecture Mapping(Contd. | Download Verified |
| 11 | Lecture 11 : Algorithm to Efficient Architecture Mapping(Contd. | Download Verified |
| 12 | Lecture 12 : Algorithm to Efficient Architecture Mapping(Contd. | Download Verified |
| 13 | Lecture 13 : Algorithm to Efficient Architecture Mapping | Download Verified |
| 14 | Lecture 14 : Algorithm to Efficient Architecture Mapping(Contd.) | Download Verified |
| 15 | Lecture 15 : Efficient Adder Architecture | Download Verified |
| 16 | Lecture 16 : Efficient Adder Architecture (Contd.) | Download Verified |
| 17 | Lecture 17 : Efficient Adder Architecture (Contd.) | Download Verified |
| 18 | Lecture 18 : Efficient Adder Architecture | Download Verified |
| 19 | Lecture 19 : Efficient Adder Architecture | Download Verified |
| 20 | Lecture 20 : Efficient Adder Architecture | Download Verified |
| 21 | Lecture 21 : Efficient Adder Architecture | Download Verified |
| 22 | Lecture 22 : Efficient Adder Architecture | Download Verified |
| 23 | Lecture 23 : Efficient Adder Architecture | Download Verified |
| 24 | Lecture 24 : Efficient Adder Architecture | Download Verified |
| 25 | Lecture 25 : Pipelining and Parallel Processing | Download Verified |
| 26 | Lecture 26 : Pipelining and Parallel Processing | Download Verified |
| 27 | Lecture 27 : Multiplier Architecture | Download Verified |
| 28 | Lecture 28 : Multiplier Architecture | Download Verified |
| 29 | Lecture 29 : Multiplier Architecture | Download Verified |
| 30 | Lecture 30 : Multiplier Architecture | Download Verified |
| 31 | Lecture 31: Multiplier Architecture | Download Verified |
| 32 | Lecture 32: Multiplier Architecture | Download Verified |
| 33 | Lecture 33: Multiplier Architecture | Download Verified |
| 34 | Lecture 34: Multiplier Architecture | Download Verified |
| 35 | Lecture 35: Squaring Circuit Design | Download Verified |
| 36 | Lecture 36: Reconfigurable Constant Multiplier Design | Download Verified |
| 37 | Lecture 37 : Reconfigurable Constant Multiplier Design | Download Verified |
| 38 | Lecture 38 : Reconfigurable Constant Multiplier Design | Download Verified |
| 39 | Lecture 39 : Fixed Point Number Representation | Download Verified |
| 40 | Lecture 40 : Fixed Point Number Representation | Download Verified |
| 41 | Lecture 41 : CORDIC Architecture | Download Verified |
| 42 | Lecture 42 : CORDIC Architecture | Download Verified |
| 43 | Lecture 43 : CORDIC Architecture | Download Verified |
| 44 | Lecture 44 : CORDIC Architecture | Download Verified |
| 45 | Lecture 45 : Timing Analysis | Download Verified |
| 46 | Lecture 46 : Timing Analysis | Download Verified |
| 47 | Lecture 47 : Timing Analysis | Download Verified |
| 48 | Lecture 48 : Logic Hazard | Download Verified |
| 49 | Lecture 49: FFT Architecture | Download Verified |
| 50 | Lecture 50: FFT Architecture (Contd.) | Download Verified |
| 51 | Lecture 51: Timing analysis Basics | Download Verified |
| 52 | Lecture 52: Timing analysis Basics (Contd.) | Download Verified |
| 53 | Lecture 53: Timing analysis Basics (Contd.) | Download Verified |
| 54 | Lecture 54: Timing Issuesin Digital IC Design | Download Verified |
| 55 | Lecture 55: Timing Issuesin Digital IC Design (Contd.) | Download Verified |
| 56 | Lecture 56: Timing Issuesin Digital IC Design (Contd.) | Download Verified |
| 57 | Lecture 57: Timing Issuesin Digital IC Design (Contd.) | Download Verified |
| 58 | Lecture 58: Architectural Design of Digital Integrated Circuits | Download Verified |
| 59 | Lecture 59: Design Tips for Basic Circuits Design ( Contd. ) | Download Verified |
| 60 | Lecture 60: Design Tips for Basic Circuits Design ( Contd. ) | Download Verified |
| 61 | Lecture 61: Design Tips for Basic Circuits Design ( Contd. ) | Download Verified |
| 62 | Lecture 62: Low Power Digital Design | Download Verified |
| 63 | Lecture 63: Low Power Digital Design ( Contd. ) | Download Verified |
| 64 | Lecture 64: Low Power Digital Design | Download Verified |
| 65 | Lecture 65: Low Power Digital Design ( Contd. ) | Download Verified |
| 66 | Lecture 66: Hardware for Machine Learning : Design Considerations Design Tips | Download Verified |
| 67 | Lecture 67: Hardware for Machine Learning : Design Considerations Design Tips ( Contd. ) | Download Verified |
| Sl.No | Language | Book link |
|---|---|---|
| 1 | English | Download |
| 2 | Bengali | Not Available |
| 3 | Gujarati | Not Available |
| 4 | Hindi | Not Available |
| 5 | Kannada | Not Available |
| 6 | Malayalam | Not Available |
| 7 | Marathi | Not Available |
| 8 | Tamil | Not Available |
| 9 | Telugu | Not Available |