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Computer Science and Engineering
CAD for VLSI Design II (Web)
Syllabus
Co-ordinated by :
IIT Madras
Available from :
2009-12-31
Lec :
1
Modules / Lectures
CAD for VLSI Design II
Transistor Theory
Introduction to MOSFET
CMOS Transistor Fundamentals
Transistor Theory (Contd)
CMOS Transistor Theory - Delay Issues
CMOS Transistor Theory - Delay Issues (Contd)
CMOS Transistor Theory - Delay Models
Delay Elements in CMOS Circuits
Delay Elements in CMOS Circuits (Contd)
Estimating Delays in a circuit, Issues in Dynamic and Staic Timing analysis
Synthesis
Synthesis - Synthesizable and Non Synthesizable constructs
Synthesis - Logic Optimization, Resource Sharing
Synthesis - Logic Optimization, Resource Sharing (Contd)
Flip Flop and Latch optimaztion
Introduction to Logical Effort
Multistage Logic Networks
Logical effort - Optimizing performance
Logical Effort and Gain based Synthesis
Logical Effort and Gain based Synthesis (Contd)
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