| Name | Download | Download Size |
|---|---|---|
| Lecture Note | Download as zip file | 24M |
| Module Name | Download |
|---|---|
| noc19-cs72_Assignment_Week_01 | noc19-cs72_Assignment_Week_01 |
| noc19-cs72_Assignment_Week_02 | noc19-cs72_Assignment_Week_02 |
| noc19-cs72_Assignment_Week_03 | noc19-cs72_Assignment_Week_03 |
| noc19-cs72_Assignment_Week_04 | noc19-cs72_Assignment_Week_04 |
| noc19-cs72_Assignment_Week_05 | noc19-cs72_Assignment_Week_05 |
| noc19-cs72_Assignment_Week_06 | noc19-cs72_Assignment_Week_06 |
| noc19-cs72_Assignment_Week_07 | noc19-cs72_Assignment_Week_07 |
| noc19-cs72_Assignment_Week_08 | noc19-cs72_Assignment_Week_08 |
| Sl.No | Chapter Name | MP4 Download |
|---|---|---|
| 1 | Lecture 1: | Download |
| 2 | Lecture 2: | Download |
| 3 | Lecture 3: | Download |
| 4 | Lecture 4 : | Download |
| 5 | Lecture 5: | Download |
| 6 | Lecture 6: VERILOG LANGUAGE FEATURES (PART 1) | Download |
| 7 | Lecture 7: VERILOG LANGUAGE FEATURES (PART 2) | Download |
| 8 | Lecture 8: VERILOG LANGUAGE FEATURES (PART 3) | Download |
| 9 | Lecture 9: VERILOG OPERATORS | Download |
| 10 | Lecture 10:VERILOG MODELING EXAMPLES | Download |
| 11 | Lecture 11: VERILOG MODELING EXAMPLES (Contd) | Download |
| 12 | Lecture 12: VERILOG DESCRIPTION STYLES | Download |
| 13 | Lecture 13: PROCEDURAL ASSIGNMENT | Download |
| 14 | Lecture 14: PROCEDURAL ASSIGNMENT (Contd.) | Download |
| 15 | Lecture 15: PROCEDURAL ASSIGNMENT (EXAMPLES) | Download |
| 16 | Lecture 17:BLOCKING / NON-BLOCKING ASSIGNMENTS (PART 2) | Download |
| 17 | Lecture 17: BLOCKING / NON-BLOCKING ASSIGNMENTS (PART 2) | Download |
| 18 | Lecture 18:BLOCKING / NON-BLOCKING ASSIGNMENTS (PART 3) | Download |
| 19 | Lecture 19:BLOCKING / NON-BLOCKING ASSIGNMENTS (PART 4) | Download |
| 20 | Lecture 20:USER DEFINED PRIMITIVES | Download |
| 21 | Lecture 21 : VERILOG TEST BENCH | Download |
| 22 | Lecture 22 : WRITING VERILOG TEST BENCHES | Download |
| 23 | Lecture 23 : MODELING FINITE STATE MACHINES | Download |
| 24 | Lecture 24 : MODELING FINITE STATE MACHINES (Contd.) | Download |
| 25 | Lecture 25 : DATAPATH AND CONTROLLER DESIGN (PART 1) | Download |
| 26 | Lecture 26 : DATAPATH AND CONTROLLER DESIGN (PART 2) | Download |
| 27 | Lecture 27: DATAPATH AND CONTROLLER DESIGN (PART 3) | Download |
| 28 | Lecture 28 : SYNTHESIZABLE VERILOG | Download |
| 29 | Lecture 29 : SOME RECOMMENDED PRACTICES | Download |
| 30 | Lecture 30: MODELING MEMORY | Download |
| 31 | Lecture 31: MODELING REGISTER BANKS | Download |
| 32 | Lecture 32: BASIC PIPELINING CONCEPTS | Download |
| 33 | Lecture 33: PIPELINE MODELING (PART 1) | Download |
| 34 | Lecture 34: PIPELINE MODELING (PART 2) | Download |
| 35 | Lecture 35: SWITCH LEVEL MODELING (PART 1) | Download |
| 36 | Lecture 36: SWITCH LEVEL MODDELING (PART 2) | Download |
| 37 | Lecture 37 : PIPELINE IMPLEMENTATION OF A PROCESSOR (PART 1) | Download |
| 38 | Lecture 38 : PIPELINE IMPLEMENTATION OF A PROCESSOR (PART 2) | Download |
| 39 | Lecture 39 : PIPELINE IMPLEMENTATION OF A PROCESSOR (PART 3) | Download |
| 40 | Lecture 40 : VERILOG MODELING OF THE PROCESSOR (PART 1) | Download |
| 41 | Lecture 41 : VERILOG MODELING OF THE PROCESSOR (PART 2) | Download |
| Sl.No | Chapter Name | English |
|---|---|---|
| 1 | Lecture 1: | Download Verified |
| 2 | Lecture 2: | Download Verified |
| 3 | Lecture 3: | Download Verified |
| 4 | Lecture 4 : | Download Verified |
| 5 | Lecture 5: | Download Verified |
| 6 | Lecture 6: VERILOG LANGUAGE FEATURES (PART 1) | Download Verified |
| 7 | Lecture 7: VERILOG LANGUAGE FEATURES (PART 2) | Download Verified |
| 8 | Lecture 8: VERILOG LANGUAGE FEATURES (PART 3) | Download Verified |
| 9 | Lecture 9: VERILOG OPERATORS | Download Verified |
| 10 | Lecture 10:VERILOG MODELING EXAMPLES | Download Verified |
| 11 | Lecture 11: VERILOG MODELING EXAMPLES (Contd) | Download Verified |
| 12 | Lecture 12: VERILOG DESCRIPTION STYLES | Download Verified |
| 13 | Lecture 13: PROCEDURAL ASSIGNMENT | Download Verified |
| 14 | Lecture 14: PROCEDURAL ASSIGNMENT (Contd.) | Download Verified |
| 15 | Lecture 15: PROCEDURAL ASSIGNMENT (EXAMPLES) | Download Verified |
| 16 | Lecture 17:BLOCKING / NON-BLOCKING ASSIGNMENTS (PART 2) | Download Verified |
| 17 | Lecture 17: BLOCKING / NON-BLOCKING ASSIGNMENTS (PART 2) | Download Verified |
| 18 | Lecture 18:BLOCKING / NON-BLOCKING ASSIGNMENTS (PART 3) | Download Verified |
| 19 | Lecture 19:BLOCKING / NON-BLOCKING ASSIGNMENTS (PART 4) | Download Verified |
| 20 | Lecture 20:USER DEFINED PRIMITIVES | Download Verified |
| 21 | Lecture 21 : VERILOG TEST BENCH | Download Verified |
| 22 | Lecture 22 : WRITING VERILOG TEST BENCHES | Download Verified |
| 23 | Lecture 23 : MODELING FINITE STATE MACHINES | Download Verified |
| 24 | Lecture 24 : MODELING FINITE STATE MACHINES (Contd.) | Download Verified |
| 25 | Lecture 25 : DATAPATH AND CONTROLLER DESIGN (PART 1) | Download Verified |
| 26 | Lecture 26 : DATAPATH AND CONTROLLER DESIGN (PART 2) | Download Verified |
| 27 | Lecture 27: DATAPATH AND CONTROLLER DESIGN (PART 3) | Download Verified |
| 28 | Lecture 28 : SYNTHESIZABLE VERILOG | Download Verified |
| 29 | Lecture 29 : SOME RECOMMENDED PRACTICES | Download Verified |
| 30 | Lecture 30: MODELING MEMORY | Download Verified |
| 31 | Lecture 31: MODELING REGISTER BANKS | Download Verified |
| 32 | Lecture 32: BASIC PIPELINING CONCEPTS | Download Verified |
| 33 | Lecture 33: PIPELINE MODELING (PART 1) | Download Verified |
| 34 | Lecture 34: PIPELINE MODELING (PART 2) | Download Verified |
| 35 | Lecture 35: SWITCH LEVEL MODELING (PART 1) | Download Verified |
| 36 | Lecture 36: SWITCH LEVEL MODDELING (PART 2) | Download Verified |
| 37 | Lecture 37 : PIPELINE IMPLEMENTATION OF A PROCESSOR (PART 1) | Download Verified |
| 38 | Lecture 38 : PIPELINE IMPLEMENTATION OF A PROCESSOR (PART 2) | Download Verified |
| 39 | Lecture 39 : PIPELINE IMPLEMENTATION OF A PROCESSOR (PART 3) | Download Verified |
| 40 | Lecture 40 : VERILOG MODELING OF THE PROCESSOR (PART 1) | Download Verified |
| 41 | Lecture 41 : VERILOG MODELING OF THE PROCESSOR (PART 2) | Download Verified |
| Sl.No | Language | Book link |
|---|---|---|
| 1 | English | Download |
| 2 | Bengali | Not Available |
| 3 | Gujarati | Not Available |
| 4 | Hindi | Not Available |
| 5 | Kannada | Not Available |
| 6 | Malayalam | Not Available |
| 7 | Marathi | Not Available |
| 8 | Tamil | Not Available |
| 9 | Telugu | Not Available |