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Computer Science and Engineering
Computer Organisation and Architecture (Web)
Syllabus
Co-ordinated by :
IIT Kanpur
Available from :
2009-12-31
Lec :
1
Modules / Lectures
Computer Architecture
Computer Architecture
Performance Comparison
Performance Comparison
Amdahl's Law
Amdahl's Law
Instruction Set
Instruction Set
DLX
DLX
DLX Unpipelined Implementation
DLX Unpipelined Implementation
Data Hazards
Data Hazards
Exceptions and Pipelining
Exceptions and Pipelining
Pipelining Multi-cycle Opns
Pipelining Multi-cycle Opns
Handling WAW Hazards
Handling WAW Hazards
Instruction Level Parallelism
Instruction Level Parallelism
Handling Control Dependence
Handling Control Dependence
Dynamic Scheduling
Dynamic Scheduling
Branch Prediction Buffer
Branch Prediction Buffer
Superscalar DLX
Superscalar DLX
Hardware Support for Speculation
Hardware Support for Speculation
Speculation
Speculation
Block Placement
Block Placement
Cache Performance
Cache Performance
Prioritize Read Misses over Writes
Prioritize Read Misses over Writes
Small and Simple Caches
Small and Simple Caches
Main Memory
Main Memory
Multiprocessors
Multiprocessors
Multiprocessing: Classification
Multiprocessing: Classification
Cache Coherence
Cache Coherence
Snooping-Based Protocols
Snooping-Based Protocols
Synchronization
Synchronization
Sequential Consistency
Sequential Consistency
Interconnection Networks
Interconnection Networks
Buses for Communication
Buses for Communication
I/O Performance
I/O Performance
Log-Structured File System
Log-Structured File System
Vector Processing
Vector Processing
Key Take-Away Ideas
Key Take-Away Ideas
Web Content
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