3.7.1 Interconnects

Probably the most important add-ons for CMOS logic processes are additional signal and power routing layers. This greatly simplifies the routing of logic signals between modules and improves the power and clock distribution to modules. Improved routability is achieved through additional layers of metal or by improving the existing polysilicon interconnecting layer.

The connections between transistors are primarily done using a metal such as aluminum or copper and these wires are known as interconnects. In the early generations of MOS technology, only one or two metal layers were available. Presently the transistor density has increased tremendously and the number of layers of interconnect is gone over ten layers. The fabrication of interconnect begins with the first metal layer and that is used to make contact with transistor source, drain and gate terminals and to connect them to nearby V _DD , ground and input/output of other transistors.

The different levels of metals are connected to each other using contacts or vias. Generally speaking contacts are used to connect wires to transistors while vias are used to connect one metal layer to another. Typically upper layers of metal are used for global signals, clock and power distribution and must carry large amounts of currents. The cross sections are mad relatively large to keep the resistance levels low. The lower levels are intended for block level and cell level routing and are kept small for high