Figure 2.14 illustrates the above four definitions. Ideally, if one desires to have V_IH =V_IL , and V_OL =V_OH in the middle of the logic swing, then the switching of states should be abtrupt, which in turn requires very high gain in the transition region. To calculate V_IL , the inverter is supposed to be in region 2 (referring to Figure 2.12) of operation, where the p -transistor is in linear zone while the n -transistor is in saturation. The parameter V_IL is found out by considering the unity gain point on the inverter transfer characteristic where the output makes a transition from V_OH . Similarly, the parameter V_IH is found by considering the unity gain point at the V_OL end of the characteristic.

If the noise margins NM_H or NM_L are reduced to a low value, then the gate may be susceptible to switching noise that may be present at the inputs. The net effect of noise sources and noise margins on cascaded gates must be considered in estimating the overall noise immunity of a particular system. Not infrequently, noise margins are compromised to improve speed.

CMOS inverter as an amplifier : In the region 3 (referring to Figure 2.12) of operation, the inverter actually acts as an analog amplifier where both the transistors are in saturation. The input-output behaviour of the inverter in this region is given by

V_out = AV_in

where A is the stage gain given by

A = (g_mn + g_mp ) (r_dsn || r_dsp )