The switch models of both nMOS and pMOS transistors are depicted in Figure 1.2. As shown in Figure 1.2(a), an nMOS switch is deemed closed or `ON' if the gate voltage is at logic '1' voltage, or more precisely if the potential between the gate and the source terminals, namely V_GS happens to be greater than a threshold voltage V_T. A closed nMOS switch implies the existence of a continuous channel between the source and the drain terminals. On the other hand, an 'OFF' or open nMOS switch indicates the absence of a connecting channel between the source and the drain. Similarly, a pMOS switch is considered 'ON' or closed if the potential V_GS is smaller or more negative than the threshold voltage V_T. Threshold voltage and related issues will be dealt with in detail in the next chapter.