1. Accumulation: In this mode, there is accumulation of holes (assuming n-MOSFET) at the Si-SiO2 interface. All the field lines emanating from the gate terminate on this layer giving an effective dielectric thickness as the oxide thickness (shown in Fig. 4.2a). In this mode, Vg <0
2. Depletion: As we move from negative to positive gate voltages the holes at the interface are repelled and pushed back into the bulk leaving a depleted layer. This layer counters the positive charge on the gate and keeps increasing till the gate voltage is below threshold voltage. As shown in Fig. 4.2b we see a larger effective dielectric length and hence a lower capacitance.
3. Strong Inversion: When Vg crosses threshold voltage, the increase in depletion region width stops and charge on layer is countered by mobile electrons at Si-SiO2 interface. This is called inversion because the mobile charges are opposite to the type of charges found in substrate. In this case the inversion layer is formed by the electrons. Field lines hence
terminate on this layer thereby reducing the effective dielectric thickness as shown in Fig. 4.2c)
