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1.2 Course Objectives |
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The course provides for final year undergraduates a solid and fundamental engineering view of digital system operation and how to design systematically well performing digital VLSI systems exceeding consistently, customer expectations and competitor fears. The aim is to teach the critical methods and circuit structures to identify the key 1 % of the circuitry on-chip which dominates the performance, reliability, manufacturability, and the cost of the VLSI circuit. With the current utilisation of the deep submicron CMOS technologies (0.25 micron and below design rules) the major design paradigm shift is associated with the fact that the interconnections (metal Al or Cu wires connecting gates) and the chip communication in general is the main design object instead of active transistors or logic gates. The main design issues defining the make-or-break point in each project is associated with power and signal distribution and bit/symbol communication between functional blocks on-chip and off-chip. In the course we provide a solid framework in understanding: |
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- Scaling of technology and their impact on interconnects |
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- Interconnects as design objects |
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- Noise in digital systems and its impact on system operation |
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- Power distribution schemes for low noise |
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- Signal and signalling conventions for on-chip and off-chip communication |
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- Timing and synchronisation for fundamental operations and signalling |
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The course objective is to provide the student with a solid understanding of the underlying mechanism and solution techniques to the above key design issues, so that the student, when working as industrial designer, is capable of identifying the key problem points and focus his creative attention and 90% of available resources to right issues for 1% of the circuitry and leave the remaining 99% of circuitry to computer automated tools or unqualified engineers. |
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