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A variety of circuit designs are available for AD conversion. These include, (a) successive approximation, (b) single-and dual-slope integration, (c) voltage-to-frequency conversion, (d) counter and servo and e parallel conversion. Among these, the method of successive approximation is perhaps the most widely used and is described here. The successive approximation method of AD conversion is capable of both high resolution as well as high speed (throughput rates exceeding 1MHz). Each conversion is independent of the results of previous ones. The conversion time is constant and independent of the magnitude of the input voltage.
The converter proceeds to convert the analog input by finding a `Yes' or `No' answer for the following sequence of questions:
- Is the input greater than half the full scale?
- If not
- Is the input greater than one-fourth of the full scale?
- Is the input greater than three-fourth of the full scale?
If the answer to (a) is `No', check for (b-i); if `Yes', check for (b-ii)
The above procedure is continued until the desired resolution is obtained. For bit converter, such questions are asked and the resolution obtained is one in The time taken for the conversion is clock periods and is the same irrespective of the magnitude of the input. Initially, the shift register is cleared and on ``start conversion" command, a ``1" is stored in the MSB. The resulting D A converter output is compared with the analog input. Depending on the decision of the comparator (``1" if analog input is greater than the DA converter output, and ``0" otherwise), a ``1" or ``0" is assigned to the MSB and a ``1" is stored in the next lower bit. Again, the DA converter output is compared with the analog input and the earlier procedure is continued. After the last bit has been tried, the ``status" line changes state to indicate that the contents of the output register now constitute the valid output of the conversion process. A digital binary code corresponding to the input signal is thus available at the output.
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