Module 5: Performance Issues in Shared Memory and Introduction to Coherence
  Lecture 10: Introduction to Coherence
 


What Went Wrong?

  • Need to formalize the intuitive memory model
    • In sequential programs the order of read/write is defined by the program order; the notion of “last write” is well-defined
    • For multiprocessors how do you define “last write to a memory location” in presence of independent caches?
    • Within a processor it is still fine, but how do you order read/write across processors?

Definitions

  • Memory operation : a read (load), a write (store), or a read-modify-write
    • Assumed to take place atomically
  • A memory operation is said to issue when it leaves the issue queue and looks up the cache
  • A memory operation is said to perform with respect to a processor when a processor can tell that from other issued memory operations
    • A read is said to perform with respect to a processor when subsequent writes issued by that processor cannot affect the returned read value
    • A write is said to perform with respect to a processor when a subsequent read from that processor to the same address returns the new value