Module 18: "TLP on Chip: HT/SMT and CMP"
  Lecture 41: "Case Studies: Intel Montecito and Sun Niagara"
 


TLP on Chip: HT/SMT and CMP

Intel Montecito

Features

Overview

Dual threads

Thread urgency

Core arbiter

Power efficiency

Foxton technology

Die photo

Sun Niagara OR Ultrasparc T1

Features

Pipeline details

Cache hierarchy

Thread selection