Module 13: "Scalable Multiprocessors"
  Lecture 28: "Scalable Multiprocessors"
 

Physical scaling

  • Integration at various levels
    • Chip-level integration to keep wires short: nCUBE/2 (1990) puts the processor, router, MMU, DRAM interface on a single chip
    • Board-level integration: Thinking machine CM-5 uses the core of a Sun SparcStation 1 and other peripherals on a single board to realize a node
    • System-level integration: IBM SP1 and SP2 exploit commodity RS6000 workstations and connect them through an external communication assist / network interface card and a router

IBM SP-2

Programming model

  • Shared address space
    • Communication initiated by load/store instructions
    • Requires local or remote memory access before the data can be sent
    • Request/response protocol initiated by receiver
  • Message passing
    • A one way communication: normally initiated by the sender
    • Number of sends can be buffered before a matching receive shows up
    • Synchronous vs. asynchronous sends
  • Active messages
    • Restricted form of remote procedure call