Increment/Decrement group
Operation |
Operation Performed
|
OP code |
Flags affected |
INR r
(Increment register)
|
|
0 0 D D D 1 0 0 |
Z, S, P, AC |
INR M
(Increment memory)
|
|
0 0 1 1 0 1 0 0 |
Z, S, P, AC |
DCR r
(Decrement register)
|
|
0 0 D D D 1 0 1 |
Z, S, P, AC |
DCR M
(Decrement memory)
|
|
0 0 1 1 0 1 0 1 |
Z, S, P, AC |
INX rp
(Increment register pair)
|
|
0 0 R P 0 0 1 1 |
None |
DCX rp
(Decrement register pair)
|
|
0 0 R P 1 0 1 1 |
None |
DAD rp
(Add register pair to H & L)
|
|
0 0 R P 1 0 0 1 |
CY |
DAA
(Decimal Adjust Accumulator) |
The eight bit number in the accumulator is adjusted to form two four-bit Binary-coded decimal digits. |
0 0 1 0 0 1 1 1 |
Z,S,P,AC,C |
|