| Name | Download | Download Size |
|---|---|---|
| Lecture Note | Download as zip file | 22M |
| Module Name | Download |
|---|---|
| noc20_ee27_assigment_1 | noc20_ee27_assigment_1 |
| noc20_ee27_assigment_10 | noc20_ee27_assigment_10 |
| noc20_ee27_assigment_11 | noc20_ee27_assigment_11 |
| noc20_ee27_assigment_12 | noc20_ee27_assigment_12 |
| noc20_ee27_assigment_13 | noc20_ee27_assigment_13 |
| noc20_ee27_assigment_2 | noc20_ee27_assigment_2 |
| noc20_ee27_assigment_3 | noc20_ee27_assigment_3 |
| noc20_ee27_assigment_4 | noc20_ee27_assigment_4 |
| noc20_ee27_assigment_5 | noc20_ee27_assigment_5 |
| noc20_ee27_assigment_6 | noc20_ee27_assigment_6 |
| noc20_ee27_assigment_7 | noc20_ee27_assigment_7 |
| noc20_ee27_assigment_8 | noc20_ee27_assigment_8 |
| noc20_ee27_assigment_9 | noc20_ee27_assigment_9 |
| Sl.No | Chapter Name | MP4 Download |
|---|---|---|
| 1 | Introduction to the course | Download |
| 2 | Obtaining power gain | Download |
| 3 | Obtaining power gain using a linear two port? | Download |
| 4 | One port(two terminal) nonlinear element | Download |
| 5 | Nonlinear circuit analysis | Download |
| 6 | Small signal incremental analysis-graphical view | Download |
| 7 | Small signal incremental analysis | Download |
| 8 | Incremental equivalent circuit | Download |
| 9 | Large signal characteristics of a diode | Download |
| 10 | Analysis of diode circuits | Download |
| 11 | Small signal model of a diode | Download |
| 12 | Two port nonlinearity | Download |
| 13 | Small signal equivalent of a two port network | Download |
| 14 | Small signal equivalent circuit of a two port network | Download |
| 15 | Gain of a two port network | Download |
| 16 | Constraints on small signal parameters to maximize the gain | Download |
| 17 | Constraints on large signal characteristics to maximize the gain | Download |
| 18 | Implications of constraints in terms of the circuit equivalent | Download |
| 19 | MOS transistor-description | Download |
| 20 | MOS transistor large signal characteristics | Download |
| 21 | MOS transistor large signal characteristics-graphical view | Download |
| 22 | MOS transistor small signal characteristics | Download |
| 23 | Linear (Triode) region of the MOS transistor | Download |
| 24 | Small signal amplifier using the MOS transistor | Download |
| 25 | Basic amplifier structure | Download |
| 26 | Problems with the basic structure | Download |
| 27 | Adding bias and signal-ac coupling | Download |
| 28 | Common source amplifier with biasing | Download |
| 29 | Common source amplifier: Small signal equivalent circuit | Download |
| 30 | Common source amplifier analysis: Effect of biasing components | Download |
| 31 | Constraint on the input coupling capacitor | Download |
| 32 | Constraint on the output coupling capacitor | Download |
| 33 | Dependence of ID on VDS | Download |
| 34 | Small signal output conductance of a MOS transistor | Download |
| 35 | Effect of gds on a common source amplifier; Inherent gain limit of a transistor | Download |
| 36 | Variation gm with transistor parameters | Download |
| 37 | Variation of gm with constant VGS and constant drain current bias | Download |
| 38 | Negative feedback control for constant drain current bias | Download |
| 39 | Types of feedback for constant drain current bias | Download |
| 40 | Sense at the drain and feedback to the gate-Drain feedback | Download |
| 41 | Intuitive explanation of low sensitivity with drain feedback | Download |
| 42 | Common source amplifier with drain feedback bias | Download |
| 43 | Constraint on the gate bias resistor | Download |
| 44 | Constraint on the input coupling capacitor | Download |
| 45 | Constraint on the output coupling capacitor | Download |
| 46 | Input and output resistances of the common source amplifier with constant VGS bias | Download |
| 47 | Current mirror | Download |
| 48 | Common souce amplifier with current mirror bias | Download |
| 49 | Constraint on coupling capacitors and bias resistance | Download |
| 50 | Diode connected transistor | Download |
| 51 | Source feedback biasing | Download |
| 52 | Common source amplifier with source feedback bias | Download |
| 53 | Constraints on capacitor values | Download |
| 54 | Sensing at the drain and feeding back to the source | Download |
| 55 | Sensing at the source and feeding back to the gate | Download |
| 56 | Ensuring that transistor is in saturation | Download |
| 57 | Using a resistor instead of current source for biasing | Download |
| 58 | Controlled sources using a MOS transistor-Introduction | Download |
| 59 | Voltage controlled voltage source | Download |
| 60 | VCVS using a MOS transistor | Download |
| 61 | VCVS using a MOS transistor-Small signal picture | Download |
| 62 | VCVS using a MOS transistor-Complete circuit | Download |
| 63 | Source follower: Effect of output conductance; Constraints on coupling capacitors | Download |
| 64 | VCCS using a MOS transistor | Download |
| 65 | VCCS using a MOS transistor: Small signal picture | Download |
| 66 | VCCS using a MOS transistor: Complete circuit | Download |
| 67 | VCCS using a MOS transistor: AC coupling the output | Download |
| 68 | Source degenrated CS amplifier | Download |
| 69 | CCCS using a MOS transistor | Download |
| 70 | CCCS using a MOS transistor: Small signal picture | Download |
| 71 | CCCS using a MOS transistor: Complete circuit | Download |
| 72 | CCVS using a MOS transistor | Download |
| 73 | CCVS using a MOS transistor: Gain | Download |
| 74 | CCVS using a MOS transistor: Input and output resistances | Download |
| 75 | CCVS using a MOS transistor: Complete circuit | Download |
| 76 | VCVS using an opamp | Download |
| 77 | CCVS using an opamp | Download |
| 78 | Negative feedback and virtual short in an opamp | Download |
| 79 | Negative feedback and virtual short in a transistor | Download |
| 80 | Constraints on controlled sources using opamps and transistors | Download |
| 81 | Quick tour of amplifying devices | Download |
| 82 | Signal swing limits in amplifiers | Download |
| 83 | Swing limit due to transistor entering triode region | Download |
| 84 | Swing limit due to transistor entering cutoff region | Download |
| 85 | Swing limit calculation example | Download |
| 86 | Swing limits-more calculations | Download |
| 87 | pMOS transistor | Download |
| 88 | Small signal model of the pMOS transistor | Download |
| 89 | Common source amplifier using the pMOS transistor | Download |
| 90 | Swing limits of the pMOS common source amplifier | Download |
| 91 | Biasing a pMOS transistor at a constant current; pMOS current mirror | Download |
| 92 | Converting nMOS transistor circuits to pMOS | Download |
| 93 | Bias current generation | Download |
| 94 | Examples of more than one transistor in feedback | Download |
| 95 | Gain limitation in a common source amplifier with resistive load | Download |
| 96 | nMOS active load for pMOS common source amplifier | Download |
| 97 | CMOS inverter | Download |
| 98 | Large signal characteristics of pMOS CS amplifier with nMOS active load | Download |
| 99 | Large signal characteristics of nMOS CS amplifier with pMOS active load | Download |
| 100 | Large signal characteristics of a CMOS inverter | Download |
| 101 | Active load amplifiers as digital gates | Download |
| 102 | Sensitivity of output bias to input bias in a CMOS inverter | Download |
| 103 | Self biasing a CMOS inverter | Download |
| 104 | An application of self biased inverters | Download |
| 105 | Current consumption of a self-biased inverter; Current biasing | Download |
| 106 | Amplifying a difference signal; Differential pair | Download |
| 107 | Differential pair-small signal basics | Download |
| 108 | Biasing a differential pair | Download |
| 109 | Differential pair with differential excitation | Download |
| 110 | Differential pair with a current mirror load | Download |
| 111 | Differential pair with a current mirror load-operating point | Download |
| 112 | Differential pair with a current mirror load-Norton equivalent current | Download |
| 113 | Differential pair with a current mirror load-Norton equivalent resistance | Download |
| 114 | Common mode gain | Download |
| 115 | Single stage opamp | Download |
| 116 | Single stage opamp: Input common mode swing limits | Download |
| 117 | Single stage opamp: Output swing limits | Download |
| 118 | Which transistor type to use for the second stage? | Download |
| 119 | Small signal gain | Download |
| 120 | DC negative feedback biasing of all stages | Download |
| 121 | DC negative feedback biasing of all stages, cont'd | Download |
| 122 | Small signal model | Download |
| 123 | Swing limits | Download |
| 124 | Systematic offset; How to eliminate it | Download |
| 125 | Bipolar junction transistor(BJT): Large signal model | Download |
| 126 | BJT model for calculating operating points | Download |
| 127 | BJT small signal model | Download |
| 128 | Biasing a BJT | Download |
| 129 | Biasing a BJT, cont'd | Download |
| 130 | Amplifiers using BJTs | Download |
| 131 | PNP transistor | Download |
| Sl.No | Chapter Name | English |
|---|---|---|
| 1 | Introduction to the course | Download Verified |
| 2 | Obtaining power gain | Download Verified |
| 3 | Obtaining power gain using a linear two port? | Download Verified |
| 4 | One port(two terminal) nonlinear element | Download Verified |
| 5 | Nonlinear circuit analysis | Download Verified |
| 6 | Small signal incremental analysis-graphical view | Download Verified |
| 7 | Small signal incremental analysis | Download Verified |
| 8 | Incremental equivalent circuit | Download Verified |
| 9 | Large signal characteristics of a diode | Download Verified |
| 10 | Analysis of diode circuits | Download Verified |
| 11 | Small signal model of a diode | Download Verified |
| 12 | Two port nonlinearity | Download Verified |
| 13 | Small signal equivalent of a two port network | Download Verified |
| 14 | Small signal equivalent circuit of a two port network | Download Verified |
| 15 | Gain of a two port network | Download Verified |
| 16 | Constraints on small signal parameters to maximize the gain | Download Verified |
| 17 | Constraints on large signal characteristics to maximize the gain | Download Verified |
| 18 | Implications of constraints in terms of the circuit equivalent | Download Verified |
| 19 | MOS transistor-description | Download Verified |
| 20 | MOS transistor large signal characteristics | Download Verified |
| 21 | MOS transistor large signal characteristics-graphical view | Download Verified |
| 22 | MOS transistor small signal characteristics | Download Verified |
| 23 | Linear (Triode) region of the MOS transistor | Download Verified |
| 24 | Small signal amplifier using the MOS transistor | Download Verified |
| 25 | Basic amplifier structure | Download Verified |
| 26 | Problems with the basic structure | Download Verified |
| 27 | Adding bias and signal-ac coupling | Download Verified |
| 28 | Common source amplifier with biasing | Download Verified |
| 29 | Common source amplifier: Small signal equivalent circuit | Download Verified |
| 30 | Common source amplifier analysis: Effect of biasing components | Download Verified |
| 31 | Constraint on the input coupling capacitor | Download Verified |
| 32 | Constraint on the output coupling capacitor | Download Verified |
| 33 | Dependence of ID on VDS | Download Verified |
| 34 | Small signal output conductance of a MOS transistor | Download Verified |
| 35 | Effect of gds on a common source amplifier; Inherent gain limit of a transistor | Download Verified |
| 36 | Variation gm with transistor parameters | Download Verified |
| 37 | Variation of gm with constant VGS and constant drain current bias | Download Verified |
| 38 | Negative feedback control for constant drain current bias | Download Verified |
| 39 | Types of feedback for constant drain current bias | Download Verified |
| 40 | Sense at the drain and feedback to the gate-Drain feedback | Download Verified |
| 41 | Intuitive explanation of low sensitivity with drain feedback | Download Verified |
| 42 | Common source amplifier with drain feedback bias | Download Verified |
| 43 | Constraint on the gate bias resistor | Download Verified |
| 44 | Constraint on the input coupling capacitor | Download Verified |
| 45 | Constraint on the output coupling capacitor | Download Verified |
| 46 | Input and output resistances of the common source amplifier with constant VGS bias | Download Verified |
| 47 | Current mirror | Download Verified |
| 48 | Common souce amplifier with current mirror bias | Download Verified |
| 49 | Constraint on coupling capacitors and bias resistance | Download Verified |
| 50 | Diode connected transistor | Download Verified |
| 51 | Source feedback biasing | Download Verified |
| 52 | Common source amplifier with source feedback bias | Download Verified |
| 53 | Constraints on capacitor values | Download Verified |
| 54 | Sensing at the drain and feeding back to the source | Download Verified |
| 55 | Sensing at the source and feeding back to the gate | Download Verified |
| 56 | Ensuring that transistor is in saturation | Download Verified |
| 57 | Using a resistor instead of current source for biasing | Download Verified |
| 58 | Controlled sources using a MOS transistor-Introduction | Download Verified |
| 59 | Voltage controlled voltage source | Download Verified |
| 60 | VCVS using a MOS transistor | Download Verified |
| 61 | VCVS using a MOS transistor-Small signal picture | Download Verified |
| 62 | VCVS using a MOS transistor-Complete circuit | Download Verified |
| 63 | Source follower: Effect of output conductance; Constraints on coupling capacitors | Download Verified |
| 64 | VCCS using a MOS transistor | Download Verified |
| 65 | VCCS using a MOS transistor: Small signal picture | Download Verified |
| 66 | VCCS using a MOS transistor: Complete circuit | Download Verified |
| 67 | VCCS using a MOS transistor: AC coupling the output | Download Verified |
| 68 | Source degenrated CS amplifier | Download Verified |
| 69 | CCCS using a MOS transistor | Download Verified |
| 70 | CCCS using a MOS transistor: Small signal picture | Download Verified |
| 71 | CCCS using a MOS transistor: Complete circuit | Download Verified |
| 72 | CCVS using a MOS transistor | Download Verified |
| 73 | CCVS using a MOS transistor: Gain | Download Verified |
| 74 | CCVS using a MOS transistor: Input and output resistances | Download Verified |
| 75 | CCVS using a MOS transistor: Complete circuit | Download Verified |
| 76 | VCVS using an opamp | Download Verified |
| 77 | CCVS using an opamp | Download Verified |
| 78 | Negative feedback and virtual short in an opamp | Download Verified |
| 79 | Negative feedback and virtual short in a transistor | Download Verified |
| 80 | Constraints on controlled sources using opamps and transistors | Download Verified |
| 81 | Quick tour of amplifying devices | Download Verified |
| 82 | Signal swing limits in amplifiers | Download Verified |
| 83 | Swing limit due to transistor entering triode region | Download Verified |
| 84 | Swing limit due to transistor entering cutoff region | Download Verified |
| 85 | Swing limit calculation example | Download Verified |
| 86 | Swing limits-more calculations | Download Verified |
| 87 | pMOS transistor | Download Verified |
| 88 | Small signal model of the pMOS transistor | Download Verified |
| 89 | Common source amplifier using the pMOS transistor | Download Verified |
| 90 | Swing limits of the pMOS common source amplifier | Download Verified |
| 91 | Biasing a pMOS transistor at a constant current; pMOS current mirror | Download Verified |
| 92 | Converting nMOS transistor circuits to pMOS | Download Verified |
| 93 | Bias current generation | Download Verified |
| 94 | Examples of more than one transistor in feedback | Download Verified |
| 95 | Gain limitation in a common source amplifier with resistive load | Download Verified |
| 96 | nMOS active load for pMOS common source amplifier | PDF unavailable |
| 97 | CMOS inverter | PDF unavailable |
| 98 | Large signal characteristics of pMOS CS amplifier with nMOS active load | PDF unavailable |
| 99 | Large signal characteristics of nMOS CS amplifier with pMOS active load | PDF unavailable |
| 100 | Large signal characteristics of a CMOS inverter | PDF unavailable |
| 101 | Active load amplifiers as digital gates | PDF unavailable |
| 102 | Sensitivity of output bias to input bias in a CMOS inverter | PDF unavailable |
| 103 | Self biasing a CMOS inverter | PDF unavailable |
| 104 | An application of self biased inverters | PDF unavailable |
| 105 | Current consumption of a self-biased inverter; Current biasing | PDF unavailable |
| 106 | Amplifying a difference signal; Differential pair | PDF unavailable |
| 107 | Differential pair-small signal basics | PDF unavailable |
| 108 | Biasing a differential pair | PDF unavailable |
| 109 | Differential pair with differential excitation | PDF unavailable |
| 110 | Differential pair with a current mirror load | PDF unavailable |
| 111 | Differential pair with a current mirror load-operating point | PDF unavailable |
| 112 | Differential pair with a current mirror load-Norton equivalent current | PDF unavailable |
| 113 | Differential pair with a current mirror load-Norton equivalent resistance | PDF unavailable |
| 114 | Common mode gain | PDF unavailable |
| 115 | Single stage opamp | PDF unavailable |
| 116 | Single stage opamp: Input common mode swing limits | PDF unavailable |
| 117 | Single stage opamp: Output swing limits | PDF unavailable |
| 118 | Which transistor type to use for the second stage? | PDF unavailable |
| 119 | Small signal gain | PDF unavailable |
| 120 | DC negative feedback biasing of all stages | PDF unavailable |
| 121 | DC negative feedback biasing of all stages, cont'd | PDF unavailable |
| 122 | Small signal model | PDF unavailable |
| 123 | Swing limits | PDF unavailable |
| 124 | Systematic offset; How to eliminate it | PDF unavailable |
| 125 | Bipolar junction transistor(BJT): Large signal model | PDF unavailable |
| 126 | BJT model for calculating operating points | PDF unavailable |
| 127 | BJT small signal model | PDF unavailable |
| 128 | Biasing a BJT | PDF unavailable |
| 129 | Biasing a BJT, cont'd | PDF unavailable |
| 130 | Amplifiers using BJTs | PDF unavailable |
| 131 | PNP transistor | PDF unavailable |
| Sl.No | Chapter Name | Bengali |
|---|---|---|
| 1 | Introduction to the course | Download |
| 2 | Obtaining power gain | Download |
| 3 | Obtaining power gain using a linear two port? | Download |
| 4 | One port(two terminal) nonlinear element | Download |
| 5 | Nonlinear circuit analysis | Download |
| 6 | Small signal incremental analysis-graphical view | Download |
| 7 | Small signal incremental analysis | Download |
| 8 | Incremental equivalent circuit | Download |
| 9 | Large signal characteristics of a diode | Download |
| 10 | Analysis of diode circuits | Download |
| 11 | Small signal model of a diode | Download |
| 12 | Two port nonlinearity | Download |
| 13 | Small signal equivalent of a two port network | Download |
| 14 | Small signal equivalent circuit of a two port network | Download |
| 15 | Gain of a two port network | Download |
| 16 | Constraints on small signal parameters to maximize the gain | Download |
| 17 | Constraints on large signal characteristics to maximize the gain | Download |
| 18 | Implications of constraints in terms of the circuit equivalent | Download |
| 19 | MOS transistor-description | Download |
| 20 | MOS transistor large signal characteristics | Download |
| 21 | MOS transistor large signal characteristics-graphical view | Download |
| 22 | MOS transistor small signal characteristics | Download |
| 23 | Linear (Triode) region of the MOS transistor | Download |
| 24 | Small signal amplifier using the MOS transistor | Download |
| 25 | Basic amplifier structure | Download |
| 26 | Problems with the basic structure | Download |
| 27 | Adding bias and signal-ac coupling | Download |
| 28 | Common source amplifier with biasing | Download |
| 29 | Common source amplifier: Small signal equivalent circuit | Download |
| 30 | Common source amplifier analysis: Effect of biasing components | Download |
| 31 | Constraint on the input coupling capacitor | Download |
| 32 | Constraint on the output coupling capacitor | Download |
| 33 | Dependence of ID on VDS | Download |
| 34 | Small signal output conductance of a MOS transistor | Download |
| 35 | Effect of gds on a common source amplifier; Inherent gain limit of a transistor | Download |
| 36 | Variation gm with transistor parameters | Download |
| 37 | Variation of gm with constant VGS and constant drain current bias | Download |
| 38 | Negative feedback control for constant drain current bias | Download |
| 39 | Types of feedback for constant drain current bias | Download |
| 40 | Sense at the drain and feedback to the gate-Drain feedback | Download |
| 41 | Intuitive explanation of low sensitivity with drain feedback | Download |
| 42 | Common source amplifier with drain feedback bias | Download |
| 43 | Constraint on the gate bias resistor | Download |
| 44 | Constraint on the input coupling capacitor | Download |
| 45 | Constraint on the output coupling capacitor | Download |
| 46 | Input and output resistances of the common source amplifier with constant VGS bias | Download |
| 47 | Current mirror | Download |
| 48 | Common souce amplifier with current mirror bias | Download |
| 49 | Constraint on coupling capacitors and bias resistance | Download |
| 50 | Diode connected transistor | Download |
| 51 | Source feedback biasing | Download |
| 52 | Common source amplifier with source feedback bias | Download |
| 53 | Constraints on capacitor values | Download |
| 54 | Sensing at the drain and feeding back to the source | Download |
| 55 | Sensing at the source and feeding back to the gate | Download |
| 56 | Ensuring that transistor is in saturation | Download |
| 57 | Using a resistor instead of current source for biasing | Download |
| 58 | Controlled sources using a MOS transistor-Introduction | Download |
| 59 | Voltage controlled voltage source | Download |
| 60 | VCVS using a MOS transistor | Download |
| 61 | VCVS using a MOS transistor-Small signal picture | Download |
| 62 | VCVS using a MOS transistor-Complete circuit | Download |
| 63 | Source follower: Effect of output conductance; Constraints on coupling capacitors | Download |
| 64 | VCCS using a MOS transistor | Download |
| 65 | VCCS using a MOS transistor: Small signal picture | Download |
| 66 | VCCS using a MOS transistor: Complete circuit | Download |
| 67 | VCCS using a MOS transistor: AC coupling the output | Download |
| 68 | Source degenrated CS amplifier | Download |
| 69 | CCCS using a MOS transistor | Download |
| 70 | CCCS using a MOS transistor: Small signal picture | Download |
| 71 | CCCS using a MOS transistor: Complete circuit | Download |
| 72 | CCVS using a MOS transistor | Download |
| 73 | CCVS using a MOS transistor: Gain | Download |
| 74 | CCVS using a MOS transistor: Input and output resistances | Download |
| 75 | CCVS using a MOS transistor: Complete circuit | Download |
| 76 | VCVS using an opamp | Download |
| 77 | CCVS using an opamp | Download |
| 78 | Negative feedback and virtual short in an opamp | Download |
| 79 | Negative feedback and virtual short in a transistor | Download |
| 80 | Constraints on controlled sources using opamps and transistors | Download |
| 81 | Quick tour of amplifying devices | Download |
| 82 | Signal swing limits in amplifiers | Download |
| 83 | Swing limit due to transistor entering triode region | Download |
| 84 | Swing limit due to transistor entering cutoff region | Download |
| 85 | Swing limit calculation example | Download |
| 86 | Swing limits-more calculations | Download |
| 87 | pMOS transistor | Download |
| 88 | Small signal model of the pMOS transistor | Download |
| 89 | Common source amplifier using the pMOS transistor | Download |
| 90 | Swing limits of the pMOS common source amplifier | Download |
| 91 | Biasing a pMOS transistor at a constant current; pMOS current mirror | Download |
| 92 | Converting nMOS transistor circuits to pMOS | Download |
| 93 | Bias current generation | Download |
| 94 | Examples of more than one transistor in feedback | Download |
| 95 | Gain limitation in a common source amplifier with resistive load | Not Available |
| 96 | nMOS active load for pMOS common source amplifier | Not Available |
| 97 | CMOS inverter | Not Available |
| 98 | Large signal characteristics of pMOS CS amplifier with nMOS active load | Not Available |
| 99 | Large signal characteristics of nMOS CS amplifier with pMOS active load | Not Available |
| 100 | Large signal characteristics of a CMOS inverter | Not Available |
| 101 | Active load amplifiers as digital gates | Not Available |
| 102 | Sensitivity of output bias to input bias in a CMOS inverter | Not Available |
| 103 | Self biasing a CMOS inverter | Not Available |
| 104 | An application of self biased inverters | Not Available |
| 105 | Current consumption of a self-biased inverter; Current biasing | Not Available |
| 106 | Amplifying a difference signal; Differential pair | Not Available |
| 107 | Differential pair-small signal basics | Not Available |
| 108 | Biasing a differential pair | Not Available |
| 109 | Differential pair with differential excitation | Not Available |
| 110 | Differential pair with a current mirror load | Not Available |
| 111 | Differential pair with a current mirror load-operating point | Not Available |
| 112 | Differential pair with a current mirror load-Norton equivalent current | Not Available |
| 113 | Differential pair with a current mirror load-Norton equivalent resistance | Not Available |
| 114 | Common mode gain | Not Available |
| 115 | Single stage opamp | Not Available |
| 116 | Single stage opamp: Input common mode swing limits | Not Available |
| 117 | Single stage opamp: Output swing limits | Not Available |
| 118 | Which transistor type to use for the second stage? | Not Available |
| 119 | Small signal gain | Not Available |
| 120 | DC negative feedback biasing of all stages | Not Available |
| 121 | DC negative feedback biasing of all stages, cont'd | Not Available |
| 122 | Small signal model | Not Available |
| 123 | Swing limits | Not Available |
| 124 | Systematic offset; How to eliminate it | Not Available |
| 125 | Bipolar junction transistor(BJT): Large signal model | Not Available |
| 126 | BJT model for calculating operating points | Not Available |
| 127 | BJT small signal model | Not Available |
| 128 | Biasing a BJT | Not Available |
| 129 | Biasing a BJT, cont'd | Not Available |
| 130 | Amplifiers using BJTs | Not Available |
| 131 | PNP transistor | Not Available |
| Sl.No | Chapter Name | Gujarati |
|---|---|---|
| 1 | Introduction to the course | Download |
| 2 | Obtaining power gain | Download |
| 3 | Obtaining power gain using a linear two port? | Download |
| 4 | One port(two terminal) nonlinear element | Download |
| 5 | Nonlinear circuit analysis | Download |
| 6 | Small signal incremental analysis-graphical view | Download |
| 7 | Small signal incremental analysis | Download |
| 8 | Incremental equivalent circuit | Download |
| 9 | Large signal characteristics of a diode | Download |
| 10 | Analysis of diode circuits | Download |
| 11 | Small signal model of a diode | Download |
| 12 | Two port nonlinearity | Download |
| 13 | Small signal equivalent of a two port network | Download |
| 14 | Small signal equivalent circuit of a two port network | Download |
| 15 | Gain of a two port network | Download |
| 16 | Constraints on small signal parameters to maximize the gain | Download |
| 17 | Constraints on large signal characteristics to maximize the gain | Download |
| 18 | Implications of constraints in terms of the circuit equivalent | Download |
| 19 | MOS transistor-description | Download |
| 20 | MOS transistor large signal characteristics | Download |
| 21 | MOS transistor large signal characteristics-graphical view | Download |
| 22 | MOS transistor small signal characteristics | Download |
| 23 | Linear (Triode) region of the MOS transistor | Download |
| 24 | Small signal amplifier using the MOS transistor | Download |
| 25 | Basic amplifier structure | Download |
| 26 | Problems with the basic structure | Download |
| 27 | Adding bias and signal-ac coupling | Download |
| 28 | Common source amplifier with biasing | Download |
| 29 | Common source amplifier: Small signal equivalent circuit | Download |
| 30 | Common source amplifier analysis: Effect of biasing components | Download |
| 31 | Constraint on the input coupling capacitor | Download |
| 32 | Constraint on the output coupling capacitor | Download |
| 33 | Dependence of ID on VDS | Download |
| 34 | Small signal output conductance of a MOS transistor | Download |
| 35 | Effect of gds on a common source amplifier; Inherent gain limit of a transistor | Download |
| 36 | Variation gm with transistor parameters | Download |
| 37 | Variation of gm with constant VGS and constant drain current bias | Download |
| 38 | Negative feedback control for constant drain current bias | Download |
| 39 | Types of feedback for constant drain current bias | Download |
| 40 | Sense at the drain and feedback to the gate-Drain feedback | Download |
| 41 | Intuitive explanation of low sensitivity with drain feedback | Download |
| 42 | Common source amplifier with drain feedback bias | Download |
| 43 | Constraint on the gate bias resistor | Download |
| 44 | Constraint on the input coupling capacitor | Download |
| 45 | Constraint on the output coupling capacitor | Download |
| 46 | Input and output resistances of the common source amplifier with constant VGS bias | Download |
| 47 | Current mirror | Download |
| 48 | Common souce amplifier with current mirror bias | Download |
| 49 | Constraint on coupling capacitors and bias resistance | Download |
| 50 | Diode connected transistor | Download |
| 51 | Source feedback biasing | Download |
| 52 | Common source amplifier with source feedback bias | Download |
| 53 | Constraints on capacitor values | Download |
| 54 | Sensing at the drain and feeding back to the source | Download |
| 55 | Sensing at the source and feeding back to the gate | Download |
| 56 | Ensuring that transistor is in saturation | Download |
| 57 | Using a resistor instead of current source for biasing | Download |
| 58 | Controlled sources using a MOS transistor-Introduction | Download |
| 59 | Voltage controlled voltage source | Download |
| 60 | VCVS using a MOS transistor | Download |
| 61 | VCVS using a MOS transistor-Small signal picture | Download |
| 62 | VCVS using a MOS transistor-Complete circuit | Download |
| 63 | Source follower: Effect of output conductance; Constraints on coupling capacitors | Download |
| 64 | VCCS using a MOS transistor | Download |
| 65 | VCCS using a MOS transistor: Small signal picture | Download |
| 66 | VCCS using a MOS transistor: Complete circuit | Download |
| 67 | VCCS using a MOS transistor: AC coupling the output | Download |
| 68 | Source degenrated CS amplifier | Download |
| 69 | CCCS using a MOS transistor | Download |
| 70 | CCCS using a MOS transistor: Small signal picture | Download |
| 71 | CCCS using a MOS transistor: Complete circuit | Download |
| 72 | CCVS using a MOS transistor | Download |
| 73 | CCVS using a MOS transistor: Gain | Download |
| 74 | CCVS using a MOS transistor: Input and output resistances | Download |
| 75 | CCVS using a MOS transistor: Complete circuit | Download |
| 76 | VCVS using an opamp | Download |
| 77 | CCVS using an opamp | Download |
| 78 | Negative feedback and virtual short in an opamp | Download |
| 79 | Negative feedback and virtual short in a transistor | Download |
| 80 | Constraints on controlled sources using opamps and transistors | Download |
| 81 | Quick tour of amplifying devices | Download |
| 82 | Signal swing limits in amplifiers | Download |
| 83 | Swing limit due to transistor entering triode region | Download |
| 84 | Swing limit due to transistor entering cutoff region | Download |
| 85 | Swing limit calculation example | Download |
| 86 | Swing limits-more calculations | Download |
| 87 | pMOS transistor | Download |
| 88 | Small signal model of the pMOS transistor | Download |
| 89 | Common source amplifier using the pMOS transistor | Download |
| 90 | Swing limits of the pMOS common source amplifier | Download |
| 91 | Biasing a pMOS transistor at a constant current; pMOS current mirror | Download |
| 92 | Converting nMOS transistor circuits to pMOS | Download |
| 93 | Bias current generation | Download |
| 94 | Examples of more than one transistor in feedback | Download |
| 95 | Gain limitation in a common source amplifier with resistive load | Not Available |
| 96 | nMOS active load for pMOS common source amplifier | Not Available |
| 97 | CMOS inverter | Not Available |
| 98 | Large signal characteristics of pMOS CS amplifier with nMOS active load | Not Available |
| 99 | Large signal characteristics of nMOS CS amplifier with pMOS active load | Not Available |
| 100 | Large signal characteristics of a CMOS inverter | Not Available |
| 101 | Active load amplifiers as digital gates | Not Available |
| 102 | Sensitivity of output bias to input bias in a CMOS inverter | Not Available |
| 103 | Self biasing a CMOS inverter | Not Available |
| 104 | An application of self biased inverters | Not Available |
| 105 | Current consumption of a self-biased inverter; Current biasing | Not Available |
| 106 | Amplifying a difference signal; Differential pair | Not Available |
| 107 | Differential pair-small signal basics | Not Available |
| 108 | Biasing a differential pair | Not Available |
| 109 | Differential pair with differential excitation | Not Available |
| 110 | Differential pair with a current mirror load | Not Available |
| 111 | Differential pair with a current mirror load-operating point | Not Available |
| 112 | Differential pair with a current mirror load-Norton equivalent current | Not Available |
| 113 | Differential pair with a current mirror load-Norton equivalent resistance | Not Available |
| 114 | Common mode gain | Not Available |
| 115 | Single stage opamp | Not Available |
| 116 | Single stage opamp: Input common mode swing limits | Not Available |
| 117 | Single stage opamp: Output swing limits | Not Available |
| 118 | Which transistor type to use for the second stage? | Not Available |
| 119 | Small signal gain | Not Available |
| 120 | DC negative feedback biasing of all stages | Not Available |
| 121 | DC negative feedback biasing of all stages, cont'd | Not Available |
| 122 | Small signal model | Not Available |
| 123 | Swing limits | Not Available |
| 124 | Systematic offset; How to eliminate it | Not Available |
| 125 | Bipolar junction transistor(BJT): Large signal model | Not Available |
| 126 | BJT model for calculating operating points | Not Available |
| 127 | BJT small signal model | Not Available |
| 128 | Biasing a BJT | Not Available |
| 129 | Biasing a BJT, cont'd | Not Available |
| 130 | Amplifiers using BJTs | Not Available |
| 131 | PNP transistor | Not Available |
| Sl.No | Chapter Name | Hindi |
|---|---|---|
| 1 | Introduction to the course | Download |
| 2 | Obtaining power gain | Download |
| 3 | Obtaining power gain using a linear two port? | Download |
| 4 | One port(two terminal) nonlinear element | Download |
| 5 | Nonlinear circuit analysis | Download |
| 6 | Small signal incremental analysis-graphical view | Download |
| 7 | Small signal incremental analysis | Download |
| 8 | Incremental equivalent circuit | Download |
| 9 | Large signal characteristics of a diode | Download |
| 10 | Analysis of diode circuits | Download |
| 11 | Small signal model of a diode | Download |
| 12 | Two port nonlinearity | Download |
| 13 | Small signal equivalent of a two port network | Download |
| 14 | Small signal equivalent circuit of a two port network | Download |
| 15 | Gain of a two port network | Download |
| 16 | Constraints on small signal parameters to maximize the gain | Download |
| 17 | Constraints on large signal characteristics to maximize the gain | Download |
| 18 | Implications of constraints in terms of the circuit equivalent | Download |
| 19 | MOS transistor-description | Download |
| 20 | MOS transistor large signal characteristics | Download |
| 21 | MOS transistor large signal characteristics-graphical view | Download |
| 22 | MOS transistor small signal characteristics | Download |
| 23 | Linear (Triode) region of the MOS transistor | Download |
| 24 | Small signal amplifier using the MOS transistor | Download |
| 25 | Basic amplifier structure | Download |
| 26 | Problems with the basic structure | Download |
| 27 | Adding bias and signal-ac coupling | Download |
| 28 | Common source amplifier with biasing | Download |
| 29 | Common source amplifier: Small signal equivalent circuit | Download |
| 30 | Common source amplifier analysis: Effect of biasing components | Download |
| 31 | Constraint on the input coupling capacitor | Download |
| 32 | Constraint on the output coupling capacitor | Download |
| 33 | Dependence of ID on VDS | Download |
| 34 | Small signal output conductance of a MOS transistor | Download |
| 35 | Effect of gds on a common source amplifier; Inherent gain limit of a transistor | Download |
| 36 | Variation gm with transistor parameters | Download |
| 37 | Variation of gm with constant VGS and constant drain current bias | Download |
| 38 | Negative feedback control for constant drain current bias | Download |
| 39 | Types of feedback for constant drain current bias | Download |
| 40 | Sense at the drain and feedback to the gate-Drain feedback | Download |
| 41 | Intuitive explanation of low sensitivity with drain feedback | Download |
| 42 | Common source amplifier with drain feedback bias | Download |
| 43 | Constraint on the gate bias resistor | Download |
| 44 | Constraint on the input coupling capacitor | Download |
| 45 | Constraint on the output coupling capacitor | Download |
| 46 | Input and output resistances of the common source amplifier with constant VGS bias | Download |
| 47 | Current mirror | Download |
| 48 | Common souce amplifier with current mirror bias | Download |
| 49 | Constraint on coupling capacitors and bias resistance | Download |
| 50 | Diode connected transistor | Download |
| 51 | Source feedback biasing | Download |
| 52 | Common source amplifier with source feedback bias | Download |
| 53 | Constraints on capacitor values | Download |
| 54 | Sensing at the drain and feeding back to the source | Download |
| 55 | Sensing at the source and feeding back to the gate | Download |
| 56 | Ensuring that transistor is in saturation | Download |
| 57 | Using a resistor instead of current source for biasing | Download |
| 58 | Controlled sources using a MOS transistor-Introduction | Download |
| 59 | Voltage controlled voltage source | Download |
| 60 | VCVS using a MOS transistor | Download |
| 61 | VCVS using a MOS transistor-Small signal picture | Download |
| 62 | VCVS using a MOS transistor-Complete circuit | Download |
| 63 | Source follower: Effect of output conductance; Constraints on coupling capacitors | Download |
| 64 | VCCS using a MOS transistor | Download |
| 65 | VCCS using a MOS transistor: Small signal picture | Download |
| 66 | VCCS using a MOS transistor: Complete circuit | Download |
| 67 | VCCS using a MOS transistor: AC coupling the output | Download |
| 68 | Source degenrated CS amplifier | Download |
| 69 | CCCS using a MOS transistor | Download |
| 70 | CCCS using a MOS transistor: Small signal picture | Download |
| 71 | CCCS using a MOS transistor: Complete circuit | Download |
| 72 | CCVS using a MOS transistor | Download |
| 73 | CCVS using a MOS transistor: Gain | Download |
| 74 | CCVS using a MOS transistor: Input and output resistances | Download |
| 75 | CCVS using a MOS transistor: Complete circuit | Download |
| 76 | VCVS using an opamp | Download |
| 77 | CCVS using an opamp | Download |
| 78 | Negative feedback and virtual short in an opamp | Download |
| 79 | Negative feedback and virtual short in a transistor | Download |
| 80 | Constraints on controlled sources using opamps and transistors | Download |
| 81 | Quick tour of amplifying devices | Download |
| 82 | Signal swing limits in amplifiers | Download |
| 83 | Swing limit due to transistor entering triode region | Download |
| 84 | Swing limit due to transistor entering cutoff region | Download |
| 85 | Swing limit calculation example | Download |
| 86 | Swing limits-more calculations | Download |
| 87 | pMOS transistor | Download |
| 88 | Small signal model of the pMOS transistor | Download |
| 89 | Common source amplifier using the pMOS transistor | Download |
| 90 | Swing limits of the pMOS common source amplifier | Download |
| 91 | Biasing a pMOS transistor at a constant current; pMOS current mirror | Download |
| 92 | Converting nMOS transistor circuits to pMOS | Download |
| 93 | Bias current generation | Download |
| 94 | Examples of more than one transistor in feedback | Download |
| 95 | Gain limitation in a common source amplifier with resistive load | Not Available |
| 96 | nMOS active load for pMOS common source amplifier | Not Available |
| 97 | CMOS inverter | Not Available |
| 98 | Large signal characteristics of pMOS CS amplifier with nMOS active load | Not Available |
| 99 | Large signal characteristics of nMOS CS amplifier with pMOS active load | Not Available |
| 100 | Large signal characteristics of a CMOS inverter | Not Available |
| 101 | Active load amplifiers as digital gates | Not Available |
| 102 | Sensitivity of output bias to input bias in a CMOS inverter | Not Available |
| 103 | Self biasing a CMOS inverter | Not Available |
| 104 | An application of self biased inverters | Not Available |
| 105 | Current consumption of a self-biased inverter; Current biasing | Not Available |
| 106 | Amplifying a difference signal; Differential pair | Not Available |
| 107 | Differential pair-small signal basics | Not Available |
| 108 | Biasing a differential pair | Not Available |
| 109 | Differential pair with differential excitation | Not Available |
| 110 | Differential pair with a current mirror load | Not Available |
| 111 | Differential pair with a current mirror load-operating point | Not Available |
| 112 | Differential pair with a current mirror load-Norton equivalent current | Not Available |
| 113 | Differential pair with a current mirror load-Norton equivalent resistance | Not Available |
| 114 | Common mode gain | Not Available |
| 115 | Single stage opamp | Not Available |
| 116 | Single stage opamp: Input common mode swing limits | Not Available |
| 117 | Single stage opamp: Output swing limits | Not Available |
| 118 | Which transistor type to use for the second stage? | Not Available |
| 119 | Small signal gain | Not Available |
| 120 | DC negative feedback biasing of all stages | Not Available |
| 121 | DC negative feedback biasing of all stages, cont'd | Not Available |
| 122 | Small signal model | Not Available |
| 123 | Swing limits | Not Available |
| 124 | Systematic offset; How to eliminate it | Not Available |
| 125 | Bipolar junction transistor(BJT): Large signal model | Not Available |
| 126 | BJT model for calculating operating points | Not Available |
| 127 | BJT small signal model | Not Available |
| 128 | Biasing a BJT | Not Available |
| 129 | Biasing a BJT, cont'd | Not Available |
| 130 | Amplifiers using BJTs | Not Available |
| 131 | PNP transistor | Not Available |
| Sl.No | Chapter Name | Kannada |
|---|---|---|
| 1 | Introduction to the course | Download |
| 2 | Obtaining power gain | Download |
| 3 | Obtaining power gain using a linear two port? | Download |
| 4 | One port(two terminal) nonlinear element | Download |
| 5 | Nonlinear circuit analysis | Download |
| 6 | Small signal incremental analysis-graphical view | Download |
| 7 | Small signal incremental analysis | Download |
| 8 | Incremental equivalent circuit | Download |
| 9 | Large signal characteristics of a diode | Download |
| 10 | Analysis of diode circuits | Download |
| 11 | Small signal model of a diode | Download |
| 12 | Two port nonlinearity | Download |
| 13 | Small signal equivalent of a two port network | Download |
| 14 | Small signal equivalent circuit of a two port network | Download |
| 15 | Gain of a two port network | Download |
| 16 | Constraints on small signal parameters to maximize the gain | Download |
| 17 | Constraints on large signal characteristics to maximize the gain | Download |
| 18 | Implications of constraints in terms of the circuit equivalent | Download |
| 19 | MOS transistor-description | Download |
| 20 | MOS transistor large signal characteristics | Download |
| 21 | MOS transistor large signal characteristics-graphical view | Download |
| 22 | MOS transistor small signal characteristics | Download |
| 23 | Linear (Triode) region of the MOS transistor | Download |
| 24 | Small signal amplifier using the MOS transistor | Download |
| 25 | Basic amplifier structure | Download |
| 26 | Problems with the basic structure | Download |
| 27 | Adding bias and signal-ac coupling | Download |
| 28 | Common source amplifier with biasing | Download |
| 29 | Common source amplifier: Small signal equivalent circuit | Download |
| 30 | Common source amplifier analysis: Effect of biasing components | Download |
| 31 | Constraint on the input coupling capacitor | Download |
| 32 | Constraint on the output coupling capacitor | Download |
| 33 | Dependence of ID on VDS | Download |
| 34 | Small signal output conductance of a MOS transistor | Download |
| 35 | Effect of gds on a common source amplifier; Inherent gain limit of a transistor | Download |
| 36 | Variation gm with transistor parameters | Download |
| 37 | Variation of gm with constant VGS and constant drain current bias | Download |
| 38 | Negative feedback control for constant drain current bias | Download |
| 39 | Types of feedback for constant drain current bias | Download |
| 40 | Sense at the drain and feedback to the gate-Drain feedback | Download |
| 41 | Intuitive explanation of low sensitivity with drain feedback | Download |
| 42 | Common source amplifier with drain feedback bias | Download |
| 43 | Constraint on the gate bias resistor | Download |
| 44 | Constraint on the input coupling capacitor | Download |
| 45 | Constraint on the output coupling capacitor | Download |
| 46 | Input and output resistances of the common source amplifier with constant VGS bias | Download |
| 47 | Current mirror | Download |
| 48 | Common souce amplifier with current mirror bias | Download |
| 49 | Constraint on coupling capacitors and bias resistance | Download |
| 50 | Diode connected transistor | Download |
| 51 | Source feedback biasing | Download |
| 52 | Common source amplifier with source feedback bias | Download |
| 53 | Constraints on capacitor values | Download |
| 54 | Sensing at the drain and feeding back to the source | Download |
| 55 | Sensing at the source and feeding back to the gate | Download |
| 56 | Ensuring that transistor is in saturation | Download |
| 57 | Using a resistor instead of current source for biasing | Download |
| 58 | Controlled sources using a MOS transistor-Introduction | Download |
| 59 | Voltage controlled voltage source | Download |
| 60 | VCVS using a MOS transistor | Download |
| 61 | VCVS using a MOS transistor-Small signal picture | Download |
| 62 | VCVS using a MOS transistor-Complete circuit | Download |
| 63 | Source follower: Effect of output conductance; Constraints on coupling capacitors | Download |
| 64 | VCCS using a MOS transistor | Download |
| 65 | VCCS using a MOS transistor: Small signal picture | Download |
| 66 | VCCS using a MOS transistor: Complete circuit | Download |
| 67 | VCCS using a MOS transistor: AC coupling the output | Download |
| 68 | Source degenrated CS amplifier | Download |
| 69 | CCCS using a MOS transistor | Download |
| 70 | CCCS using a MOS transistor: Small signal picture | Download |
| 71 | CCCS using a MOS transistor: Complete circuit | Download |
| 72 | CCVS using a MOS transistor | Download |
| 73 | CCVS using a MOS transistor: Gain | Download |
| 74 | CCVS using a MOS transistor: Input and output resistances | Download |
| 75 | CCVS using a MOS transistor: Complete circuit | Download |
| 76 | VCVS using an opamp | Download |
| 77 | CCVS using an opamp | Download |
| 78 | Negative feedback and virtual short in an opamp | Download |
| 79 | Negative feedback and virtual short in a transistor | Download |
| 80 | Constraints on controlled sources using opamps and transistors | Download |
| 81 | Quick tour of amplifying devices | Download |
| 82 | Signal swing limits in amplifiers | Download |
| 83 | Swing limit due to transistor entering triode region | Download |
| 84 | Swing limit due to transistor entering cutoff region | Download |
| 85 | Swing limit calculation example | Download |
| 86 | Swing limits-more calculations | Download |
| 87 | pMOS transistor | Download |
| 88 | Small signal model of the pMOS transistor | Download |
| 89 | Common source amplifier using the pMOS transistor | Download |
| 90 | Swing limits of the pMOS common source amplifier | Download |
| 91 | Biasing a pMOS transistor at a constant current; pMOS current mirror | Download |
| 92 | Converting nMOS transistor circuits to pMOS | Download |
| 93 | Bias current generation | Download |
| 94 | Examples of more than one transistor in feedback | Download |
| 95 | Gain limitation in a common source amplifier with resistive load | Not Available |
| 96 | nMOS active load for pMOS common source amplifier | Not Available |
| 97 | CMOS inverter | Not Available |
| 98 | Large signal characteristics of pMOS CS amplifier with nMOS active load | Not Available |
| 99 | Large signal characteristics of nMOS CS amplifier with pMOS active load | Not Available |
| 100 | Large signal characteristics of a CMOS inverter | Not Available |
| 101 | Active load amplifiers as digital gates | Not Available |
| 102 | Sensitivity of output bias to input bias in a CMOS inverter | Not Available |
| 103 | Self biasing a CMOS inverter | Not Available |
| 104 | An application of self biased inverters | Not Available |
| 105 | Current consumption of a self-biased inverter; Current biasing | Not Available |
| 106 | Amplifying a difference signal; Differential pair | Not Available |
| 107 | Differential pair-small signal basics | Not Available |
| 108 | Biasing a differential pair | Not Available |
| 109 | Differential pair with differential excitation | Not Available |
| 110 | Differential pair with a current mirror load | Not Available |
| 111 | Differential pair with a current mirror load-operating point | Not Available |
| 112 | Differential pair with a current mirror load-Norton equivalent current | Not Available |
| 113 | Differential pair with a current mirror load-Norton equivalent resistance | Not Available |
| 114 | Common mode gain | Not Available |
| 115 | Single stage opamp | Not Available |
| 116 | Single stage opamp: Input common mode swing limits | Not Available |
| 117 | Single stage opamp: Output swing limits | Not Available |
| 118 | Which transistor type to use for the second stage? | Not Available |
| 119 | Small signal gain | Not Available |
| 120 | DC negative feedback biasing of all stages | Not Available |
| 121 | DC negative feedback biasing of all stages, cont'd | Not Available |
| 122 | Small signal model | Not Available |
| 123 | Swing limits | Not Available |
| 124 | Systematic offset; How to eliminate it | Not Available |
| 125 | Bipolar junction transistor(BJT): Large signal model | Not Available |
| 126 | BJT model for calculating operating points | Not Available |
| 127 | BJT small signal model | Not Available |
| 128 | Biasing a BJT | Not Available |
| 129 | Biasing a BJT, cont'd | Not Available |
| 130 | Amplifiers using BJTs | Not Available |
| 131 | PNP transistor | Not Available |
| Sl.No | Chapter Name | Malayalam |
|---|---|---|
| 1 | Introduction to the course | Download |
| 2 | Obtaining power gain | Download |
| 3 | Obtaining power gain using a linear two port? | Download |
| 4 | One port(two terminal) nonlinear element | Download |
| 5 | Nonlinear circuit analysis | Download |
| 6 | Small signal incremental analysis-graphical view | Download |
| 7 | Small signal incremental analysis | Download |
| 8 | Incremental equivalent circuit | Download |
| 9 | Large signal characteristics of a diode | Download |
| 10 | Analysis of diode circuits | Download |
| 11 | Small signal model of a diode | Download |
| 12 | Two port nonlinearity | Download |
| 13 | Small signal equivalent of a two port network | Download |
| 14 | Small signal equivalent circuit of a two port network | Download |
| 15 | Gain of a two port network | Download |
| 16 | Constraints on small signal parameters to maximize the gain | Download |
| 17 | Constraints on large signal characteristics to maximize the gain | Download |
| 18 | Implications of constraints in terms of the circuit equivalent | Download |
| 19 | MOS transistor-description | Download |
| 20 | MOS transistor large signal characteristics | Download |
| 21 | MOS transistor large signal characteristics-graphical view | Download |
| 22 | MOS transistor small signal characteristics | Download |
| 23 | Linear (Triode) region of the MOS transistor | Download |
| 24 | Small signal amplifier using the MOS transistor | Download |
| 25 | Basic amplifier structure | Download |
| 26 | Problems with the basic structure | Download |
| 27 | Adding bias and signal-ac coupling | Download |
| 28 | Common source amplifier with biasing | Download |
| 29 | Common source amplifier: Small signal equivalent circuit | Download |
| 30 | Common source amplifier analysis: Effect of biasing components | Download |
| 31 | Constraint on the input coupling capacitor | Download |
| 32 | Constraint on the output coupling capacitor | Download |
| 33 | Dependence of ID on VDS | Download |
| 34 | Small signal output conductance of a MOS transistor | Download |
| 35 | Effect of gds on a common source amplifier; Inherent gain limit of a transistor | Download |
| 36 | Variation gm with transistor parameters | Download |
| 37 | Variation of gm with constant VGS and constant drain current bias | Download |
| 38 | Negative feedback control for constant drain current bias | Download |
| 39 | Types of feedback for constant drain current bias | Download |
| 40 | Sense at the drain and feedback to the gate-Drain feedback | Download |
| 41 | Intuitive explanation of low sensitivity with drain feedback | Download |
| 42 | Common source amplifier with drain feedback bias | Download |
| 43 | Constraint on the gate bias resistor | Download |
| 44 | Constraint on the input coupling capacitor | Download |
| 45 | Constraint on the output coupling capacitor | Download |
| 46 | Input and output resistances of the common source amplifier with constant VGS bias | Download |
| 47 | Current mirror | Download |
| 48 | Common souce amplifier with current mirror bias | Download |
| 49 | Constraint on coupling capacitors and bias resistance | Download |
| 50 | Diode connected transistor | Download |
| 51 | Source feedback biasing | Download |
| 52 | Common source amplifier with source feedback bias | Download |
| 53 | Constraints on capacitor values | Download |
| 54 | Sensing at the drain and feeding back to the source | Download |
| 55 | Sensing at the source and feeding back to the gate | Download |
| 56 | Ensuring that transistor is in saturation | Download |
| 57 | Using a resistor instead of current source for biasing | Download |
| 58 | Controlled sources using a MOS transistor-Introduction | Download |
| 59 | Voltage controlled voltage source | Download |
| 60 | VCVS using a MOS transistor | Download |
| 61 | VCVS using a MOS transistor-Small signal picture | Download |
| 62 | VCVS using a MOS transistor-Complete circuit | Download |
| 63 | Source follower: Effect of output conductance; Constraints on coupling capacitors | Download |
| 64 | VCCS using a MOS transistor | Download |
| 65 | VCCS using a MOS transistor: Small signal picture | Download |
| 66 | VCCS using a MOS transistor: Complete circuit | Download |
| 67 | VCCS using a MOS transistor: AC coupling the output | Download |
| 68 | Source degenrated CS amplifier | Download |
| 69 | CCCS using a MOS transistor | Download |
| 70 | CCCS using a MOS transistor: Small signal picture | Download |
| 71 | CCCS using a MOS transistor: Complete circuit | Download |
| 72 | CCVS using a MOS transistor | Download |
| 73 | CCVS using a MOS transistor: Gain | Download |
| 74 | CCVS using a MOS transistor: Input and output resistances | Download |
| 75 | CCVS using a MOS transistor: Complete circuit | Download |
| 76 | VCVS using an opamp | Download |
| 77 | CCVS using an opamp | Download |
| 78 | Negative feedback and virtual short in an opamp | Download |
| 79 | Negative feedback and virtual short in a transistor | Download |
| 80 | Constraints on controlled sources using opamps and transistors | Download |
| 81 | Quick tour of amplifying devices | Download |
| 82 | Signal swing limits in amplifiers | Download |
| 83 | Swing limit due to transistor entering triode region | Download |
| 84 | Swing limit due to transistor entering cutoff region | Download |
| 85 | Swing limit calculation example | Download |
| 86 | Swing limits-more calculations | Download |
| 87 | pMOS transistor | Download |
| 88 | Small signal model of the pMOS transistor | Download |
| 89 | Common source amplifier using the pMOS transistor | Download |
| 90 | Swing limits of the pMOS common source amplifier | Download |
| 91 | Biasing a pMOS transistor at a constant current; pMOS current mirror | Download |
| 92 | Converting nMOS transistor circuits to pMOS | Download |
| 93 | Bias current generation | Download |
| 94 | Examples of more than one transistor in feedback | Download |
| 95 | Gain limitation in a common source amplifier with resistive load | Download |
| 96 | nMOS active load for pMOS common source amplifier | Not Available |
| 97 | CMOS inverter | Not Available |
| 98 | Large signal characteristics of pMOS CS amplifier with nMOS active load | Not Available |
| 99 | Large signal characteristics of nMOS CS amplifier with pMOS active load | Not Available |
| 100 | Large signal characteristics of a CMOS inverter | Not Available |
| 101 | Active load amplifiers as digital gates | Not Available |
| 102 | Sensitivity of output bias to input bias in a CMOS inverter | Not Available |
| 103 | Self biasing a CMOS inverter | Not Available |
| 104 | An application of self biased inverters | Not Available |
| 105 | Current consumption of a self-biased inverter; Current biasing | Not Available |
| 106 | Amplifying a difference signal; Differential pair | Not Available |
| 107 | Differential pair-small signal basics | Not Available |
| 108 | Biasing a differential pair | Not Available |
| 109 | Differential pair with differential excitation | Not Available |
| 110 | Differential pair with a current mirror load | Not Available |
| 111 | Differential pair with a current mirror load-operating point | Not Available |
| 112 | Differential pair with a current mirror load-Norton equivalent current | Not Available |
| 113 | Differential pair with a current mirror load-Norton equivalent resistance | Not Available |
| 114 | Common mode gain | Not Available |
| 115 | Single stage opamp | Not Available |
| 116 | Single stage opamp: Input common mode swing limits | Not Available |
| 117 | Single stage opamp: Output swing limits | Not Available |
| 118 | Which transistor type to use for the second stage? | Not Available |
| 119 | Small signal gain | Not Available |
| 120 | DC negative feedback biasing of all stages | Not Available |
| 121 | DC negative feedback biasing of all stages, cont'd | Not Available |
| 122 | Small signal model | Not Available |
| 123 | Swing limits | Not Available |
| 124 | Systematic offset; How to eliminate it | Not Available |
| 125 | Bipolar junction transistor(BJT): Large signal model | Not Available |
| 126 | BJT model for calculating operating points | Not Available |
| 127 | BJT small signal model | Not Available |
| 128 | Biasing a BJT | Not Available |
| 129 | Biasing a BJT, cont'd | Not Available |
| 130 | Amplifiers using BJTs | Not Available |
| 131 | PNP transistor | Not Available |
| Sl.No | Chapter Name | Tamil |
|---|---|---|
| 1 | Introduction to the course | Download |
| 2 | Obtaining power gain | Download |
| 3 | Obtaining power gain using a linear two port? | Download |
| 4 | One port(two terminal) nonlinear element | Download |
| 5 | Nonlinear circuit analysis | Download |
| 6 | Small signal incremental analysis-graphical view | Download |
| 7 | Small signal incremental analysis | Download |
| 8 | Incremental equivalent circuit | Download |
| 9 | Large signal characteristics of a diode | Download |
| 10 | Analysis of diode circuits | Download |
| 11 | Small signal model of a diode | Download |
| 12 | Two port nonlinearity | Download |
| 13 | Small signal equivalent of a two port network | Download |
| 14 | Small signal equivalent circuit of a two port network | Download |
| 15 | Gain of a two port network | Download |
| 16 | Constraints on small signal parameters to maximize the gain | Download |
| 17 | Constraints on large signal characteristics to maximize the gain | Download |
| 18 | Implications of constraints in terms of the circuit equivalent | Download |
| 19 | MOS transistor-description | Download |
| 20 | MOS transistor large signal characteristics | Download |
| 21 | MOS transistor large signal characteristics-graphical view | Download |
| 22 | MOS transistor small signal characteristics | Download |
| 23 | Linear (Triode) region of the MOS transistor | Download |
| 24 | Small signal amplifier using the MOS transistor | Download |
| 25 | Basic amplifier structure | Download |
| 26 | Problems with the basic structure | Download |
| 27 | Adding bias and signal-ac coupling | Download |
| 28 | Common source amplifier with biasing | Download |
| 29 | Common source amplifier: Small signal equivalent circuit | Download |
| 30 | Common source amplifier analysis: Effect of biasing components | Download |
| 31 | Constraint on the input coupling capacitor | Download |
| 32 | Constraint on the output coupling capacitor | Download |
| 33 | Dependence of ID on VDS | Download |
| 34 | Small signal output conductance of a MOS transistor | Download |
| 35 | Effect of gds on a common source amplifier; Inherent gain limit of a transistor | Download |
| 36 | Variation gm with transistor parameters | Download |
| 37 | Variation of gm with constant VGS and constant drain current bias | Download |
| 38 | Negative feedback control for constant drain current bias | Download |
| 39 | Types of feedback for constant drain current bias | Download |
| 40 | Sense at the drain and feedback to the gate-Drain feedback | Download |
| 41 | Intuitive explanation of low sensitivity with drain feedback | Download |
| 42 | Common source amplifier with drain feedback bias | Download |
| 43 | Constraint on the gate bias resistor | Download |
| 44 | Constraint on the input coupling capacitor | Download |
| 45 | Constraint on the output coupling capacitor | Download |
| 46 | Input and output resistances of the common source amplifier with constant VGS bias | Download |
| 47 | Current mirror | Download |
| 48 | Common souce amplifier with current mirror bias | Download |
| 49 | Constraint on coupling capacitors and bias resistance | Download |
| 50 | Diode connected transistor | Download |
| 51 | Source feedback biasing | Download |
| 52 | Common source amplifier with source feedback bias | Download |
| 53 | Constraints on capacitor values | Download |
| 54 | Sensing at the drain and feeding back to the source | Download |
| 55 | Sensing at the source and feeding back to the gate | Download |
| 56 | Ensuring that transistor is in saturation | Download |
| 57 | Using a resistor instead of current source for biasing | Download |
| 58 | Controlled sources using a MOS transistor-Introduction | Download |
| 59 | Voltage controlled voltage source | Download |
| 60 | VCVS using a MOS transistor | Download |
| 61 | VCVS using a MOS transistor-Small signal picture | Download |
| 62 | VCVS using a MOS transistor-Complete circuit | Download |
| 63 | Source follower: Effect of output conductance; Constraints on coupling capacitors | Download |
| 64 | VCCS using a MOS transistor | Download |
| 65 | VCCS using a MOS transistor: Small signal picture | Download |
| 66 | VCCS using a MOS transistor: Complete circuit | Download |
| 67 | VCCS using a MOS transistor: AC coupling the output | Download |
| 68 | Source degenrated CS amplifier | Download |
| 69 | CCCS using a MOS transistor | Download |
| 70 | CCCS using a MOS transistor: Small signal picture | Download |
| 71 | CCCS using a MOS transistor: Complete circuit | Download |
| 72 | CCVS using a MOS transistor | Download |
| 73 | CCVS using a MOS transistor: Gain | Download |
| 74 | CCVS using a MOS transistor: Input and output resistances | Download |
| 75 | CCVS using a MOS transistor: Complete circuit | Download |
| 76 | VCVS using an opamp | Download |
| 77 | CCVS using an opamp | Download |
| 78 | Negative feedback and virtual short in an opamp | Download |
| 79 | Negative feedback and virtual short in a transistor | Download |
| 80 | Constraints on controlled sources using opamps and transistors | Download |
| 81 | Quick tour of amplifying devices | Download |
| 82 | Signal swing limits in amplifiers | Download |
| 83 | Swing limit due to transistor entering triode region | Download |
| 84 | Swing limit due to transistor entering cutoff region | Download |
| 85 | Swing limit calculation example | Download |
| 86 | Swing limits-more calculations | Download |
| 87 | pMOS transistor | Download |
| 88 | Small signal model of the pMOS transistor | Download |
| 89 | Common source amplifier using the pMOS transistor | Download |
| 90 | Swing limits of the pMOS common source amplifier | Download |
| 91 | Biasing a pMOS transistor at a constant current; pMOS current mirror | Download |
| 92 | Converting nMOS transistor circuits to pMOS | Download |
| 93 | Bias current generation | Download |
| 94 | Examples of more than one transistor in feedback | Download |
| 95 | Gain limitation in a common source amplifier with resistive load | Download |
| 96 | nMOS active load for pMOS common source amplifier | Not Available |
| 97 | CMOS inverter | Not Available |
| 98 | Large signal characteristics of pMOS CS amplifier with nMOS active load | Not Available |
| 99 | Large signal characteristics of nMOS CS amplifier with pMOS active load | Not Available |
| 100 | Large signal characteristics of a CMOS inverter | Not Available |
| 101 | Active load amplifiers as digital gates | Not Available |
| 102 | Sensitivity of output bias to input bias in a CMOS inverter | Not Available |
| 103 | Self biasing a CMOS inverter | Not Available |
| 104 | An application of self biased inverters | Not Available |
| 105 | Current consumption of a self-biased inverter; Current biasing | Not Available |
| 106 | Amplifying a difference signal; Differential pair | Not Available |
| 107 | Differential pair-small signal basics | Not Available |
| 108 | Biasing a differential pair | Not Available |
| 109 | Differential pair with differential excitation | Not Available |
| 110 | Differential pair with a current mirror load | Not Available |
| 111 | Differential pair with a current mirror load-operating point | Not Available |
| 112 | Differential pair with a current mirror load-Norton equivalent current | Not Available |
| 113 | Differential pair with a current mirror load-Norton equivalent resistance | Not Available |
| 114 | Common mode gain | Not Available |
| 115 | Single stage opamp | Not Available |
| 116 | Single stage opamp: Input common mode swing limits | Not Available |
| 117 | Single stage opamp: Output swing limits | Not Available |
| 118 | Which transistor type to use for the second stage? | Not Available |
| 119 | Small signal gain | Not Available |
| 120 | DC negative feedback biasing of all stages | Not Available |
| 121 | DC negative feedback biasing of all stages, cont'd | Not Available |
| 122 | Small signal model | Not Available |
| 123 | Swing limits | Not Available |
| 124 | Systematic offset; How to eliminate it | Not Available |
| 125 | Bipolar junction transistor(BJT): Large signal model | Not Available |
| 126 | BJT model for calculating operating points | Not Available |
| 127 | BJT small signal model | Not Available |
| 128 | Biasing a BJT | Not Available |
| 129 | Biasing a BJT, cont'd | Not Available |
| 130 | Amplifiers using BJTs | Not Available |
| 131 | PNP transistor | Not Available |
| Sl.No | Chapter Name | Telugu |
|---|---|---|
| 1 | Introduction to the course | Download |
| 2 | Obtaining power gain | Download |
| 3 | Obtaining power gain using a linear two port? | Download |
| 4 | One port(two terminal) nonlinear element | Download |
| 5 | Nonlinear circuit analysis | Download |
| 6 | Small signal incremental analysis-graphical view | Download |
| 7 | Small signal incremental analysis | Download |
| 8 | Incremental equivalent circuit | Download |
| 9 | Large signal characteristics of a diode | Download |
| 10 | Analysis of diode circuits | Download |
| 11 | Small signal model of a diode | Download |
| 12 | Two port nonlinearity | Download |
| 13 | Small signal equivalent of a two port network | Download |
| 14 | Small signal equivalent circuit of a two port network | Download |
| 15 | Gain of a two port network | Download |
| 16 | Constraints on small signal parameters to maximize the gain | Download |
| 17 | Constraints on large signal characteristics to maximize the gain | Download |
| 18 | Implications of constraints in terms of the circuit equivalent | Download |
| 19 | MOS transistor-description | Download |
| 20 | MOS transistor large signal characteristics | Download |
| 21 | MOS transistor large signal characteristics-graphical view | Download |
| 22 | MOS transistor small signal characteristics | Download |
| 23 | Linear (Triode) region of the MOS transistor | Download |
| 24 | Small signal amplifier using the MOS transistor | Download |
| 25 | Basic amplifier structure | Download |
| 26 | Problems with the basic structure | Download |
| 27 | Adding bias and signal-ac coupling | Download |
| 28 | Common source amplifier with biasing | Download |
| 29 | Common source amplifier: Small signal equivalent circuit | Download |
| 30 | Common source amplifier analysis: Effect of biasing components | Download |
| 31 | Constraint on the input coupling capacitor | Download |
| 32 | Constraint on the output coupling capacitor | Download |
| 33 | Dependence of ID on VDS | Download |
| 34 | Small signal output conductance of a MOS transistor | Download |
| 35 | Effect of gds on a common source amplifier; Inherent gain limit of a transistor | Download |
| 36 | Variation gm with transistor parameters | Download |
| 37 | Variation of gm with constant VGS and constant drain current bias | Download |
| 38 | Negative feedback control for constant drain current bias | Download |
| 39 | Types of feedback for constant drain current bias | Download |
| 40 | Sense at the drain and feedback to the gate-Drain feedback | Download |
| 41 | Intuitive explanation of low sensitivity with drain feedback | Download |
| 42 | Common source amplifier with drain feedback bias | Download |
| 43 | Constraint on the gate bias resistor | Download |
| 44 | Constraint on the input coupling capacitor | Download |
| 45 | Constraint on the output coupling capacitor | Download |
| 46 | Input and output resistances of the common source amplifier with constant VGS bias | Download |
| 47 | Current mirror | Download |
| 48 | Common souce amplifier with current mirror bias | Download |
| 49 | Constraint on coupling capacitors and bias resistance | Download |
| 50 | Diode connected transistor | Download |
| 51 | Source feedback biasing | Download |
| 52 | Common source amplifier with source feedback bias | Download |
| 53 | Constraints on capacitor values | Download |
| 54 | Sensing at the drain and feeding back to the source | Download |
| 55 | Sensing at the source and feeding back to the gate | Download |
| 56 | Ensuring that transistor is in saturation | Download |
| 57 | Using a resistor instead of current source for biasing | Download |
| 58 | Controlled sources using a MOS transistor-Introduction | Download |
| 59 | Voltage controlled voltage source | Download |
| 60 | VCVS using a MOS transistor | Download |
| 61 | VCVS using a MOS transistor-Small signal picture | Download |
| 62 | VCVS using a MOS transistor-Complete circuit | Download |
| 63 | Source follower: Effect of output conductance; Constraints on coupling capacitors | Download |
| 64 | VCCS using a MOS transistor | Download |
| 65 | VCCS using a MOS transistor: Small signal picture | Download |
| 66 | VCCS using a MOS transistor: Complete circuit | Download |
| 67 | VCCS using a MOS transistor: AC coupling the output | Download |
| 68 | Source degenrated CS amplifier | Download |
| 69 | CCCS using a MOS transistor | Download |
| 70 | CCCS using a MOS transistor: Small signal picture | Download |
| 71 | CCCS using a MOS transistor: Complete circuit | Download |
| 72 | CCVS using a MOS transistor | Download |
| 73 | CCVS using a MOS transistor: Gain | Download |
| 74 | CCVS using a MOS transistor: Input and output resistances | Download |
| 75 | CCVS using a MOS transistor: Complete circuit | Download |
| 76 | VCVS using an opamp | Download |
| 77 | CCVS using an opamp | Download |
| 78 | Negative feedback and virtual short in an opamp | Download |
| 79 | Negative feedback and virtual short in a transistor | Download |
| 80 | Constraints on controlled sources using opamps and transistors | Download |
| 81 | Quick tour of amplifying devices | Download |
| 82 | Signal swing limits in amplifiers | Download |
| 83 | Swing limit due to transistor entering triode region | Download |
| 84 | Swing limit due to transistor entering cutoff region | Download |
| 85 | Swing limit calculation example | Download |
| 86 | Swing limits-more calculations | Download |
| 87 | pMOS transistor | Download |
| 88 | Small signal model of the pMOS transistor | Download |
| 89 | Common source amplifier using the pMOS transistor | Download |
| 90 | Swing limits of the pMOS common source amplifier | Download |
| 91 | Biasing a pMOS transistor at a constant current; pMOS current mirror | Download |
| 92 | Converting nMOS transistor circuits to pMOS | Download |
| 93 | Bias current generation | Download |
| 94 | Examples of more than one transistor in feedback | Download |
| 95 | Gain limitation in a common source amplifier with resistive load | Not Available |
| 96 | nMOS active load for pMOS common source amplifier | Not Available |
| 97 | CMOS inverter | Not Available |
| 98 | Large signal characteristics of pMOS CS amplifier with nMOS active load | Not Available |
| 99 | Large signal characteristics of nMOS CS amplifier with pMOS active load | Not Available |
| 100 | Large signal characteristics of a CMOS inverter | Not Available |
| 101 | Active load amplifiers as digital gates | Not Available |
| 102 | Sensitivity of output bias to input bias in a CMOS inverter | Not Available |
| 103 | Self biasing a CMOS inverter | Not Available |
| 104 | An application of self biased inverters | Not Available |
| 105 | Current consumption of a self-biased inverter; Current biasing | Not Available |
| 106 | Amplifying a difference signal; Differential pair | Not Available |
| 107 | Differential pair-small signal basics | Not Available |
| 108 | Biasing a differential pair | Not Available |
| 109 | Differential pair with differential excitation | Not Available |
| 110 | Differential pair with a current mirror load | Not Available |
| 111 | Differential pair with a current mirror load-operating point | Not Available |
| 112 | Differential pair with a current mirror load-Norton equivalent current | Not Available |
| 113 | Differential pair with a current mirror load-Norton equivalent resistance | Not Available |
| 114 | Common mode gain | Not Available |
| 115 | Single stage opamp | Not Available |
| 116 | Single stage opamp: Input common mode swing limits | Not Available |
| 117 | Single stage opamp: Output swing limits | Not Available |
| 118 | Which transistor type to use for the second stage? | Not Available |
| 119 | Small signal gain | Not Available |
| 120 | DC negative feedback biasing of all stages | Not Available |
| 121 | DC negative feedback biasing of all stages, cont'd | Not Available |
| 122 | Small signal model | Not Available |
| 123 | Swing limits | Not Available |
| 124 | Systematic offset; How to eliminate it | Not Available |
| 125 | Bipolar junction transistor(BJT): Large signal model | Not Available |
| 126 | BJT model for calculating operating points | Not Available |
| 127 | BJT small signal model | Not Available |
| 128 | Biasing a BJT | Not Available |
| 129 | Biasing a BJT, cont'd | Not Available |
| 130 | Amplifiers using BJTs | Not Available |
| 131 | PNP transistor | Not Available |